ICS950703 datasheet(19/24 Pages) ICST

Part #	ICS950703

Description	PROGRAMMABLE TIMING CONTROL HUB FOR P4

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Manufacturer	ICST [Integrated Circuit Systems]

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19

Integrated

Circuit

Systems, Inc.

ICS950703

0690D—05/14/04

Absolute Maximum Ratings

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V

Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to VDD +0.5 V

Ambient Operating Temperature . . . . . . . . . . . . 0°C to +70°C

Case Temperature . . . . . . . . . . . . . . . . . . . . . . . . 115°C

Storage Temperature . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C

Stresses above those listed under

Absolute Maximum Ratings may cause permanent damage to the device.These ratings are stress

specifications only and functional operation of the device at these or any other conditions above those listed in the operational

sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product

reliability.

Electrical Characteristics - Input/Supply/Common Output Parameters

TA = 0 - 70°C; Supply Voltage VDD = 3.3 V +/-5%

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Input High Voltage

VIH

2VDD + 0.3

V

Input Low Voltage

VIL

VSS - 0.3

0.8

V

IIH

VIN = VDD; Inputs with no pull-down

resistors

-200

200

µA

IIH

VIN = VDD; Inputs with pull-down resistors

5

mA

IIL1

VIN = 0 V; Inputs with no pull-up

resistors

-200

200

µA

IIL2

VIN = 0 V; Inputs with pull-up resistors

-5

mA

IDD3.3OP

CL = Full load; Select @ 100 MHz

229

230

360

mA

IDD3.3OP

CL =Full load; Select @ 133 MHz

220

233

360

mA

Powerdown Current

IDD3.3PD

IREF=5 mA

35

45

mA

Input Frequency

Fi

VDD = 3.3 V

14.318

MHz

Pin Inductance

Lpin

nH

CIN

Logic Inputs

5

pF

COUT

Output pin capacitance

6

pF

CINX

X1 & X2 pins

27

36

45

pF

Clk Stabilization

1,2

TSTAB

From PowerUp or deassertion of

PowerDown to 1st clock.

13

ms

tPZH,tPZL

Output enable delay (all outputs)

1

10

ns

tPHZ,tPLZ

Output disable delay (all outputs)

1

10

ns

1Guaranteed by design, not 100% tested in production.

2See timing diagrams for buffered and un-buffered timing requirements.

Delay

1

Input Capacitance

1

Input Low Current

Input High Current

Operating Supply

Current

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