V400HJ6 datasheet(11/34 Pages) CHIMEI

Part #	V400HJ6

Description	V400HJ6-PE1 is a 40??TFT Liquid Crystal Display TV product with driver ICs and 2ch-LVDS interface

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Manufacturer	CHIMEI [Chi Mei Corporation.]

Direct Link	http://www.chimeicorp.com/en-us/

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11 / 34 page

PRODUCT SPECIFICATION

Version 2.0

11

Date : Jun.06 2016

The copyright belongs to InnoLux. Any unauthorized use is prohibited

4. INPUT TERMINAL PIN ASSIGNMENT

4.1 TFT LCD OPEN CELL INPUT

CNF1 Connector Pin Assignment: [187059-51221 (P-Two), WF23-402-5133(FCN)]

Matting connector : [FI-RE51HL(JAE)]

Name

Description

Note

1

NC

No connection

(2)

2

SCL

I2C clock (For Vcom tunning)

3

SDA

I2C data (For Vcom tunning)

4

NC

No connection

5

NC

No connection

6

NC

No connection

(2)

7

SELLVDS

LVDS data format Selection

(3)(4)

8

NC

No Connection

9

NC

No Connection

10

NC

No connection

(2)

11

GND

Ground

12

ORX0-

Odd pixel Negative LVDS differential data input. Channel 0

13

ORX0+

Odd pixel Positive LVDS differential data input. Channel 0

14

ORX1-

Odd pixel Negative LVDS differential data input. Channel 1

15

ORX1+

Odd pixel Positive LVDS differential data input. Channel 1

16

ORX2-

Odd pixel Negative LVDS differential data input. Channel 2

17

ORX2+

Odd pixel Positive LVDS differential data input. Channel 2

(5)

18

GND

Ground

19

OCLK-

Odd pixel Negative LVDS differential clock input.

20

OCLK+

Odd pixel Positive LVDS differential clock input.

(5)

21

GND

Ground

22

ORX3-

Odd pixel Negative LVDS differential data input. Channel 3

23

ORX3+

Odd pixel Positive LVDS differential data input. Channel 3

(5)

24

N.C.

No Connection

25

N.C.

No Connection

26

N.C.

No Connection

27

N.C.

No Connection

(2)

28

ERX0-

Even pixel Negative LVDS differential data input. Channel 0

29

ERX0+

Even pixel Positive LVDS differential data input. Channel 0

30

ERX1-

Even pixel Negative LVDS differential data input. Channel 1

31

ERX1+

Even pixel Positive LVDS differential data input. Channel 1

32

ERX2-

Even pixel Negative LVDS differential data input. Channel 2

33

ERX2+

Even pixel Positive LVDS differential data input. Channel 2

(5)

34

GND

Ground

35

ECLK-

Even pixel Negative LVDS differential clock input

36

ECLK+

Even pixel Positive LVDS differential clock input

(5)

37

GND

Ground

38

ERX3-

Even pixel Negative LVDS differential data input. Channel 3

39

ERX3+

Even pixel Positive LVDS differential data input. Channel 3

(5)

40

N.C.

No Connection

41

N.C.

No Connection

42

N.C.

No Connection

43

N.C.

No Connection

(2)

44

GND

Ground

45

GND

Ground

46

GND

Ground

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