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CY7C09269A
CY7C09369A
Document #: 38-06050 Rev. *A
Page 5 of 17
Note:
7.
CEL and CER are internal signals. To select either the left or right port, both CE0 AND CE1 must be asserted to their active states (CE0 ≤ VIL and CE1 ≥ VIH).
Electrical Characteristics Over the Operating Range
Parameter
Description
CY7C09269A
CY7C09369A
Unit
-6[1]
-7
-9
-12
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
VOH
Output HIGH Voltage
(VCC = Min., IOH = –4.0 mA)
2.42.4
2.42.4
V
VOL
Output LOW Voltage
(VCC = Min., IOH = +4.0 mA)
0.40.4
0.40.4
V
VIH
Input HIGH Voltage
2.2
2.2
2.2
2.2
V
VIL
Input LOW Voltage
0.8
0.8
0.8
0.8
V
IOZ
Output Leakage Current
–10
10
–10
10
–10
10
–10
10
µA
ICC
Operating Current
(VCC =Max.,
IOUT =0 mA)
Outputs Disabled
Com’l.
250
450
235
420
215
360
195
300
mA
ISB1
Standby Current (Both
Ports TTL Level)[7]
CEL & CER ≥ VIH,
f= fMAX
Com’l.
45
115
40
105
35
95
30
85
mA
ISB2
Standby Current (One
Port TTL Level)[7] CEL
| CER ≥ VIH, f = fMAX
Com’l.
175
235
160
220
145
205
125
190
mA
ISB3
Standby Current (Both
Ports CMOS Level)[7]
CEL & CER ≥ VCC –
0.2V, f = 0
Com’l.
0.05
0.5
0.05
0.5
0.05
0.5
0.05
0.5
mA
ISB4
Standby Current (One
Port CMOS Level)[7]
CEL | CER ≥ VIH,
f= fMAX
Com’l.
160
200
145
185
130
170
110
150
mA
Capacitance
Parameter
Description
Test Conditions
Max.
Unit
CIN
Input Capacitance
TA = 25°C, f = 1 MHz,
VCC = 5.0V
10
pF
COUT
Output Capacitance
10
pF
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