xr

XR16L2552

REV. 1.1.1

2.25V TO 5.5V DUART WITH 16-BYTE FIFO

7

2.0 FUNCTIONAL DESCRIPTIONS

2.1

CPU Interface

The CPU interface is 8 data bits wide with 3 address lines and control signals to execute data bus read and

write transactions. The L2552 data interface supports the Intel compatible types of CPUs and it is compatible

to the industry standard 16C550 UART. No clock (oscillator nor external clock) is required to operate a data

bus transaction. Each bus cycle is asynchronous using CS#, IOR# and IOW# signals. Both UART channels

share the same data bus for host operations. The data bus interconnections are shown in Figure 3.

.

2.2

5-Volt Tolerant Inputs

The L2552 can accept up to 5V inputs even when operating at 3.3V or 2.5V. But note that if the L2552 is

transceiver that is operating at 5V.

2.3

Device Reset

The RESET input resets the internal registers and the serial interface outputs in both channels to their default

state (see the Table 13). An active high pulse of longer than 40 ns duration will be required to activate the

reset function in the device.

2.4

Device Identification and Revision

The L2552 provides a Device Identification code and a Device Revision code to distinguish the part from other

devices and revisions. To read the identification code from the part, it is required to set the baud rate generator

registers DLL and DLM both to 0x00. Now reading the content of the DLM will provide 0x02 to indicate L2552

and reading the content of DLL will provide the revision of the part; for example, a reading of 0x01 means

revision A.

VCC

VCC

(OP2A#)

DSRA#

CTSA#

RTSA#

DTRA#

RXA

TXA

RIA#

CDA#

(OP2B#)

DSRB#

CTSB#

RTSB#

DTRB#

RXB

TXB

RIB#

CDB#

GND

A0

A1

A2

UART_CS#

UART_CHSEL

IOR#

IOW#

D0

D1

D2

D3

D4

D5

D6

D7

A0

A1

A2

CS#

CHSEL

D0

D1

D2

D3

D4

D5

D6

D7

IOR#

IOW#

UART

Channel A

UART

Channel B

UART_INTB

UART_INTA

INTB

INTA

(RXRDYA#)

TXRDYA#

(RXRDYA#)

TXRDYA#

(RXRDYB#)

TXRDYB#

(RXRDYB#)

TXRDYB#

UART_RESET

RESET

RS-232 Serial Interface

RS-232 Serial Interface

(BAUDOUTB#)

(BAUDOUTA#)

Pins in parentheses become available through the MF# pin. MF# A/B becomes RXRDY# A/B when AFR[2:1] = '10'. MF# A/B becomes OP2# A/B

when AFR[2:1] = '00'. MF# A/B becomes BAUDOUT# A/B when AFR[1:0] = '01'. RXRDY# pins available on 48-TQFP package.