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Clock Generator for ATI RS480 Chipset
CY28RS480
Cypress Semiconductor Corporation
•
3901 North First Street
•
San Jose
, CA 95134
•
408-943-2600
Document #: 38-07638 Rev. *C
Revised February 21, 2005
Features
• Supports AMD CPU
• 200-MHz differential CPU clock pairs
• 100-MHz differential SRC clocks
• 48-MHz USB clock
• 33-MHz PCI clock
• 66-MHz HyperTransport
clock
•I2C support with readback capabilities
• Ideal Lexmark Spread Spectrum profile for maximum
electromagnetic interference (EMI) reduction
• 3.3V power supply
• 56-pin SSOP and TSSOP packages
CPU
SRC
HTT66
PCI
REF
USB_48
x2
x8
x1
x1
x 3
x 1
Block Diagram
Pin Configuration
XIN
XOUT
USB_48
VSS_48
NC
SCLK
SDATA
NC
CLKREQ#0
CLKREQ#1
SRCT5
SRCC5
VDD_SRC
VSS_SRC
SRCT4
SRCC4
SRCT3
SRCC3
VSS_SRC
VDD_SRC
SRCT2
SRCC2
SRCT1
SRCC1
VDD_REF
VSS_REF
SRCST0
VSS_SRC1
VSSA
IREF
VDDA
CPUT1
CPUC1
VSS_CPU
VDD_CPU
CPUT0
HTT66
VSS_HTT
VDD_HTT
PCI0
VDD_PCI
REF1
REF2
REF0
VDD_SRC1
VSS_SRC
SRCST1
SRCSC1
SRCT0
SRCC0
VSS_SRCS
SRCSC0
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
32
31
30
29
VDD_REF
XTAL
PLL Ref Freq
XOUT
XIN
OSC
SCLK
PLL1
I2C
Logic
VDD_48 MHz
SDATA
VDD_PCI
Divider
Network
VDD_CPU
REF[0:2]
IREF
PCI
PLL2
CPUT[0:1], CPUC[0:1],
VDD_SRC
SRCT[0:5],SRCC[0:5]
USB_48
CPU_STP#
CLKREQ[0:1]#
VDD_48
VDD_SRCS
VSS_PCI
56 SSOP/TSSOP
PD
VDD_SRCS
SRCST[0:1],SRCSC[0:1]
CPUC0
VDD_HTT
HTT66