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THNCF064MMA Datasheet(PDF) 6 Page - Toshiba Semiconductor

Part No. THNCF064MMA
Description  The THNCFxxxxMA series CompactFlash card is a flash technology based with ATA interface flash memory card
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Maker  TOSHIBA [Toshiba Semiconductor]
Homepage  http://www.semicon.toshiba.co.jp/eng
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THNCF064MMA Datasheet(HTML) 6 Page - Toshiba Semiconductor

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THNCFxxxxMA Series
2002-10-20
6/47
Preliminary
Signal Description
Signal Name
Dir
Pin No.
Description
A10 to A0
(PC Card Memory Mode)
A10 to A0
(PC Card I/O Mode)
8,10,11,12,1
4,15,16,17,1
8,19,20
These address lines along with the-REG signal are used to select
the
following:
The
I/O
port
address
registers
within
the
CompactFlash Storage Card, the memory mapped port address
registers within the CompactFlash Storage Card, a byte in the
card’s information structure and its configuration control and status
registers.
A2 to A0
(True IDE Mode)
I
18,19,20
In True IDE Mode only A [2 : 0] are used to select the one of eight
registers in the Task File, the remaining address lines should be
grounded by the host.
BVD1
(PC Card Memory Mode)
This signal is asserted high as BVD1 is not supported
STSCHG
(PC Card I/O Mode)
This signal is asserted low to alert the host to changes in the
RDY/
BSY and Write Protect states; while the I/O interface is
configured .Its use is controlled by the Card Config and Status
Register.
PDIAG
(True IDE Mode)
I/O
46
In the True IDE Mode, this input/output is the Pass Diagnostic
signal in the Master/Slave handshake protocol
BVD2
(PC Card Memory Mode)
This signal is asserted high, as BVD2 is not supported.
SPKR
(PC Card I/O Mode)
This line is the Binary Audio output from the card .If the Card does
not support the Binary Audio function, this line should be held
negated.
DASP
(True IDE Mode)
I/O
45
In the True IDE Mode, this input/output is the Disk Active/Slave
Present signal in the Master/Slave handshake protocol.
−CD1, −CD2
(PC Card Memory Mode)
CD1, CD2
(PC Card I/O Mode)
CD1, CD2
(True IDE Mode)
O
26,25
These Card Detect pins are connected to ground on the
CompactFlash Storage Card. They are used by the host to
determine that the CompactFlash Storage Card is fully inserted into
its socket.
CE1, CE2
(PC Card Memory Mode)
CE1, CE2
(PC Card I/O Mode)
These input signals are used both to select the card and to indicate
to the card whether a byte or a word operation is being
performed.
CE2 always accesses the odd byte of the word. CE1
accesses the even byte or the Odd byte of the word depending on
A0 and
CE2.A multiplexing scheme based on A0, CE1, CE2
allows 8 bit hosts to access all data on D0 to D7.
See Access specification below.
CS0, CS1
(True IDE Mode)
I
7,32
In the True IDE Mode CS0 is the chip select for the task file
registers while CS1 is used to select the Alternate Status Register
and the Device Control Register.
CSEL
(PC Card Memory Mode)
CSEL
(PC Card I/O Mode)
This signal is not used for this mode.
CSEL
(True IDE Mode)
I
39
This internally pulled up signal is used to configure this device as a
Master or a Slave when configured in the True IDE Mode.
When this pin is grounded, this device is configured as a Master.
When the pin is open, this device is configured as a Slave.
D15 to D00
(PC Card Memory Mode)
D15 to D00
(PC Card I/O Mode)
These lines carry the Data, Commands and Status information
between the host and the controller. D00 is the LSB of the Even
Byte of the Word.D08 is the LSB of the Odd Byte of the Word.
D15 to D00
(True IDE Mode)
I/O
31,30,29,28,
27,49,48,47,
6,5,4,3,2,
23,22,21
True IDE Mode, all Task File operations occur in byte mode on the
low order bus D00 to D07 while all data transfers are 16 bit using
D00 to D15.


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