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IDT72V8985 Datasheet(PDF) 1 Page - Integrated Device Technology

Part No. IDT72V8985
Description  3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH 256 x 256
Download  14 Pages
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Maker  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
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IDT72V8985 Datasheet(HTML) 1 Page - Integrated Device Technology

 
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 2003 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
AUGUST 2003
3.3 VOLT TIME SLOT INTERCHANGE
DIGITAL SWITCH
256 x 256
IDT72V8985
DSC-5707/5
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. The ST-BUSis a trademark of Mitel Corp.
FUNCTIONAL BLOCK DIAGRAM
FEATURES:
256 x 256 channel non-blocking switch
Automatic signal identification (ST-BUS®, GCI)
8 RX inputs—32 channels at 64 Kbit/s per serial line
8 TX outputs—32 channels at 64 Kbit/s per serial line
Three-state serial outputs
Microprocessor Interface (8-bit data bus)
Frame Integrity for data applications
3.3V Power Supply
Available in 44-pin Plastic Leaded Chip Carrier (PLCC),
48-pin Small Shrink Outline Package (SSOP), and 44-pin Plastic
Quad Flatpack (PQFP)
••••• Operating Temperature Range -40
°°°°°C to +85°°°°°C
••••• 3.3V I/O with 5V Tolerant Inputs
DESCRIPTION:
TheIDT72V8985isaST-BUS®/GCIcompatibledigitalswitchcontrolledby
amicroprocessor. TheIDT72V8985canhandleasmanyas256,64Kbit/sinput
and output channels. Those 256 channels are divided into 8 serial inputs and
outputs,eachofwhichconsistsof32channels.TheIDT72V8985providesper-
channelvariableorconstantthroughputdelaymodesandmicroprocessorread
and write access to individual channels. As an important function of a digital
switch is to maintain sequence integrity and minimize throughput delay, the
IDT72V8985 is an ideal solution for most switching needs.
FUNCTIONAL DESCRIPTION
Frame sequence, constant throughput delay, and guaranteed minimum
delay are high priority requirements in today’s integrated data and multimedia
networks. The IDT72V8985 provides these functions on a per-channel basis
usingastandardmicroprocessorcontrolinterface. Eachoftheeightseriallines
is designed to switch 64 Kbit/s PCM or N x 64 Kbit/s data.
InProcessorMode,themicroprocessorcanaccesstheinputandoutputtime
slots to control other devices such as ISDN transceivers and trunk interfaces.
SupportingbothGCIandST-BUS® formats,IDT72V8985hasincorporatedan
internal circuit to automatically identify the polarity and format of the frame
synchronization.
A functional block diagram of the IDT72V8985 device is shown on page 1.
The serial streams operate continuously at 2.048 Mb/s and are arranged in
125
µswideframeseachcontaining32,8-bitchannels. Eightinput(RX0-7)and
eight output (TX0-7) serial streams are provided in the IDT72V8985 device
allowing a complete 256 x 256 channel non-blocking switch matrix to be
constructed. The serial interface clock for the device is 4.096 MHz.
Microprocessor Interface
Control Register
Timing
Unit
RX0
RX1
RX2
RX3
RX4
RX5
RX6
RX7
TX0
TX1
TX2
TX3
TX4
TX5
TX6
TX7
ODE
F0i
C4i
VCC
CS
DS
R/
W A0/
A5
GND
CCO
DTA D0/
D7
5707 drw01
Receive
Serial Data
Streams
Data
Memory
Output MUX
Connection
Memory
Transmit
Serial Data
Streams
RESET(1)
NOTE:
1. The
RESET Input is only provided on the SSOP package.


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