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CY28322-2 Datasheet(PDF) 8 Page - Cypress Semiconductor

Part No. CY28322-2
Description  133-MHz Spread Spectrum Clock Synthesizer with Differential CPU Outputs
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Maker  CYPRESS [Cypress Semiconductor]
Homepage  http://www.cypress.com
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CY28322-2 Datasheet(HTML) 8 Page - Cypress Semiconductor

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PRELIMINARY
CY28322-2
Document #: 38-07145 Rev. *B
Page 8 of 17
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Switching Characteristics[8] Over the Operating Range
Parameter
Output
Description
Test Conditions
Min.
Max.
Unit
t1
All
Output Duty Cycle[9]
Measured at 1.5V
45
55
%
t3
USB, REF,
DOT
Falling Edge Rate
Between 2.4V and 0.4V
0.5
2.0
ns
t3
PCI,3V66
Falling Edge Rate
Between 2.4V and 0.4V
1.0
4.0
V/ns
t5
3V66[0:1]
3V66-3V66 Skew
Measured at 1.5V
500
ps
t5
66BUFF[0:2]
66BUFF-66BUFF Skew
Measured at 1.5V
175
ps
t6
PCI
PCI-PCI Skew
Measured at 1.5V
500
ps
t7
3V66, PCI
3V66-PCI Clock Jitter
3V66 leads. Measured at 1.5V
1.5
3.5
ns
t9
3V66
Cycle-Cycle Clock Jitter
Measured at 1.5V t9 = t9A – t9B
250
ps
t9
USB, DOT
Cycle-Cycle Clock Jitter
Measured at 1.5V t9 = t9A – t9B
350
ps
t9
PCI
Cycle-Cycle Clock Jitter
Measured at 1.5V t9 = t9A – t9B
500
ps
t9
REF
Cycle-Cycle Clock Jitter
Measured at 1.5V t9 = t9A – t9B
1000
ps
CPU 1.0V Switching Characteristics
t2
CPU
Rise Time
Measured differential waveform from
–0.35V to +0.35V
175
467
ps
t3
CPU
Fall Time
Measured differential waveform from
–0.35V to +0.35V
175
467
ps
t4
CPU
CPU-CPU Skew
Measured at Crossover
150
ps
t8
CPU
Cycle-Cycle Clock Jitter
Measured at Crossover t8 = t8A – t8B
150
ps
CPU
Rise/Fall Matching
Measured with test loads[11]
325
mV
Voh
CPU
High-level Output Voltage
including overshoot
Measured with test loads[12]
0.92
1.45
V
Vol
CPU
Low-level Output Voltage
including undershoot
Measured with test loads[12]
–0.2
0.35
V
Vcrossover
CPU
Crossover Voltage
Measured with test loads[12]
0.51
0.76
V
Notes:
9.
Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
10. Duty cycle is measured at 1.5V when VDD = 3.3V. When VDD = 2.5V, duty cycle is measured at 1.25V.
11.
Determined as a fraction of 2*(Trp – Trn)/(Trp +Trn) where Trp is a rising edge and Trn is an intersecting falling edge.
12. The 1.0V test load is shown on test circuit page.


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