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CDB4351 Datasheet(PDF) 11 Page - Cirrus Logic |
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CDB4351 Datasheet(HTML) 11 Page - Cirrus Logic |
11 / 41 page CS4351 DS566PP2 11 SWITCHING SPECIFICATIONS - SERIAL AUDIO INTERFACE Parameters Symbol Min Max Units MCLK Frequency 1.024 51.2 MHz MCLK Duty Cycle 45 55 % Input Sample Rate (Manual selection) Single-Speed Mode Double-Speed Mode Quad-Speed Mode Fs Fs Fs 4 50 100 50 100 200 kHz kHz kHz Input Sample Rate (Auto selection) Single-Speed Mode Double-Speed Mode Quad-Speed Mode Fs Fs Fs 4 84 170 50 100 200 kHz kHz kHz LRCK Duty Cycle 40 60 % SCLK Pulse Width Low tsclkl 20 - ns SCLK Pulse Width High tsclkh 20 - ns SCLK Period Single Speed Mode tsclkw -- Double Speed Mode tsclkw -- Quad Speed Mode tsclkw -- SCLK rising to LRCK edge delay tslrd 20 - ns SCLK rising to LRCK edge setup time tslrs 20 - ns SDIN valid to SCLK rising setup time tsdlrs 20 - ns SCLK rising to SDIN hold time tsdh 20 - ns sclkh t slrs t slrd t sdlrs t sd h t sclkl t SDA T A SC L K LR C K Figure 1. Serial Input Timing 1 128 ()Fs ---------------------- 1 64 ()Fs ------------------ 2 MCLK ----------------- |
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