M5M4V64S30ATP-8A datasheet(24/51 Pages) MITSUBISHI | 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM

Part #	M5M4V64S30ATP-8A

Description	64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM

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Manufacturer	MITSUBISHI [Mitsubishi Electric Semiconductor]

Direct Link	http://www.mitsubishichips.com

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MITSUBISHI LSIs

MITSUBISHI ELECTRIC

64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM

M5M4V64S30ATP-8A,-8L,-8, -10L, -10

Mar'98

SDRAM (Rev.1.3)

AUTO REFRESH

Single cycle of auto-refresh is initiated with a REFA (/CS= /RAS= /CAS= L, /WE= /CKE= H) command.

The refresh address is generated internally. 4096 REFA cycles within 64ms refresh 64Mbit memory cells.

The auto-refresh is performed on 4 banks concurrently. Before performing an auto-refresh, all banks must

be in the idle state. Auto-refresh to auto-refresh interval is minimum tRC. Any command must not be

supplied to the device before tRC from the REFA command.

Auto-Refresh

CLK

/CS

/RAS

/CAS

/WE

CKE

A0-11

BA0,1

Auto Refresh on All Banks

minimum tRC

NOP or DESELECT

Auto Refresh on All Banks

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