Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

M5M4V64S30ATP-8A Datasheet(PDF) 15 Page - Mitsubishi Electric Semiconductor

Part No. M5M4V64S30ATP-8A
Description  64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
Download  51 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  MITSUBISHI [Mitsubishi Electric Semiconductor]
Direct Link  http://www.mitsubishichips.com
Logo MITSUBISHI - Mitsubishi Electric Semiconductor

M5M4V64S30ATP-8A Datasheet(HTML) 15 Page - Mitsubishi Electric Semiconductor

Back Button M5M4V64S30ATP-8A Datasheet HTML 11Page - Mitsubishi Electric Semiconductor M5M4V64S30ATP-8A Datasheet HTML 12Page - Mitsubishi Electric Semiconductor M5M4V64S30ATP-8A Datasheet HTML 13Page - Mitsubishi Electric Semiconductor M5M4V64S30ATP-8A Datasheet HTML 14Page - Mitsubishi Electric Semiconductor M5M4V64S30ATP-8A Datasheet HTML 15Page - Mitsubishi Electric Semiconductor M5M4V64S30ATP-8A Datasheet HTML 16Page - Mitsubishi Electric Semiconductor M5M4V64S30ATP-8A Datasheet HTML 17Page - Mitsubishi Electric Semiconductor M5M4V64S30ATP-8A Datasheet HTML 18Page - Mitsubishi Electric Semiconductor M5M4V64S30ATP-8A Datasheet HTML 19Page - Mitsubishi Electric Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 15 / 51 page
background image
MITSUBISHI LSIs
MITSUBISHI ELECTRIC
64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
M5M4V64S30ATP-8A,-8L,-8, -10L, -10
Mar'98
SDRAM (Rev.1.3)
OPERATIONAL DESCRIPTION
BANK ACTIVATE
The SDRAM has four independent banks. Each bank is activated by the ACT command with the bank
addresses (BA0,1). A row is indicated by the row addresses A11-0. The minimum activation interval be-
tween one bank and the other bank is tRRD. Maximum 2 ACT commands are allowed within tRC, although
the number of banks which are active concurrently is not limited.
PRECHARGE
The PRE command deactivates the bank indicated by BA0,1. When multiple banks are active, the precharge
all command (PREA, PRE + A10=H) is available to deactivate them at the same time. After tRP from the
precharge, an ACT command to the same bank can be issued.
READ
After tRCD from the bank activation, a READ command can be issued. 1st output data is available after
the /CAS Latency from the READ, followed by (BL -1) consecutive data when the Burst Length is BL. The
start address is specified by A8-0(X8), A9-0(X4) and the address sequence of burst data is defined by the
Burst Type. A READ command may be applied to any active bank, so the row precharge time (tRP) can be
hidden behind continuous output data by interleaving the multiple banks. When A10 is high at a READ
command, the auto-precharge (READA) is performed. Any command (READ, WRITE, PRE, ACT) to the
same bank is inhibited till the internal precharge is complete. The internal precharge starts at BL after
READA. The next ACT command can be issued after (BL + tRP) from the previous READA.
Command
Bank Activation and Precharge All (BL=4, CL=3)
CLK
A0-9
A10
BA0,1
DQ
ACT
Xa
Xa
00
READ
Y
0
00
Qa0
Qa1
Qa2
Qa3
ACT
Xb
Xb
01
PRE
tRRD
tRCD
1
ACT
Xb
Xb
01
Precharge all
tRAS
tRP
tRCmin
2 ACT command / tRCmin
A11
Xa
Xb
Xb
15


Similar Part No. - M5M4V64S30ATP-8A

ManufacturerPart No.DatasheetDescription
Mitsubishi Electric Semiconductor
Mitsubishi Electric Sem...
M5M4V64S30ATP-8A MITSUBISHI-M5M4V64S30ATP-8A Datasheet
1Mb / 51P
   64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
More results

Similar Description - M5M4V64S30ATP-8A

ManufacturerPart No.DatasheetDescription
Mitsubishi Electric Semiconductor
Mitsubishi Electric Sem...
M5M4V64S30ATP-8 MITSUBISHI-M5M4V64S30ATP-8 Datasheet
1Mb / 48P
   64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
M5M4V64S20ATP-8 MITSUBISHI-M5M4V64S20ATP-8 Datasheet
1Mb / 48P
   64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
M5M4V64S20ATP-8A MITSUBISHI-M5M4V64S20ATP-8A Datasheet
1Mb / 51P
   64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
M5M4V64S40ATP-8A MITSUBISHI-M5M4V64S40ATP-8A Datasheet
1Mb / 51P
   64M (4-BANK x 1048576-WORD x 16-BIT) Synchronous DRAM
Alliance Semiconductor Corporation
Alliance Semiconductor ...
AS4C64M4SA-7TCN ALSC-AS4C64M4SA-7TCN Datasheet
1Mb / 55P
   64M x 4 bit Synchronous DRAM (SDRAM)
NEC
NEC
UPD4564323 NEC-UPD4564323 Datasheet
1Mb / 84P
   64M-bit Synchronous DRAM 4-bank, LVTTL
Elpida Memory
Elpida Memory
UPD4564163 ELPIDA-UPD4564163 Datasheet
919Kb / 85P
   64M-bit Synchronous DRAM 4-bank, LVTTL
OKI electronic componets
OKI electronic componet...
MD56V62800A OKI-MD56V62800A Datasheet
367Kb / 28P
   4-Bank x 2,097,152-Word x 8-Bit SYNCHRONOUS DYNAMIC RAM
Hynix Semiconductor
Hynix Semiconductor
GM72V66841ET HYNIX-GM72V66841ET Datasheet
90Kb / 10P
   2,097,152 WORD x 8 BIT x 4 BANK SYNCHRONOUS DYNAMIC RAM
List of Unclassifed Manufacturers
List of Unclassifed Man...
GLT5160L16 ETC-GLT5160L16 Datasheet
399Kb / 45P
   16M (2-Bank x 524288-Word x 16-Bit) Synchronous DRAM
More results


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37  38  39  40  41  42  43  44  45  46  47  48  49  50  51 


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz