M5M4V64S30ATP-8A datasheet(27/51 Pages) MITSUBISHI | 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM

Part No.	M5M4V64S30ATP-8A

Description	64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM

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Manufacturer	MITSUBISHI [Mitsubishi Electric Semiconductor]

Direct Link	http://www.mitsubishichips.com

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MITSUBISHI LSIs

MITSUBISHI ELECTRIC

64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM

M5M4V64S30ATP-8A,-8L,-8, -10L, -10

Mar'98

SDRAM (Rev.1.3)

DQM CONTROL

DQM is a dual function signal defined as the data mask for writes and the output disable for reads.

During writes, DQM masks input data word by word. DQM to write mask latency is 0.

During reads, DQM forces output to Hi-Z word by word. DQM to output Hi-Z latency is 2.

DQM Function

CLK

Command

DQ

Write

D0

D2

D3

DQM

READ

Q0

Q1

Q3

masked by DQM=H

disabled by DQM=H

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