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M5M4V64S30ATP-8A Datasheet(PDF) 25 Page - Mitsubishi Electric Semiconductor

Part No. M5M4V64S30ATP-8A
Description  64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
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Manufacturer  MITSUBISHI [Mitsubishi Electric Semiconductor]
Direct Link  http://www.mitsubishichips.com
Logo MITSUBISHI - Mitsubishi Electric Semiconductor

M5M4V64S30ATP-8A Datasheet(HTML) 25 Page - Mitsubishi Electric Semiconductor

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MITSUBISHI LSIs
MITSUBISHI ELECTRIC
64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
M5M4V64S30ATP-8A,-8L,-8, -10L, -10
Mar'98
SDRAM (Rev.1.3)
SELF REFRESH
Self-refresh mode is entered by issuing a REFS command (/CS= /RAS= /CAS= L, /WE= H, CKE= L).
Once the self-refresh is initiated, it is maintained as long as CKE is kept low. During the self-refresh mode,
CKE is asynchronous and the only enabled input ,all other inputs including CLK are disabled and ignored,
so that power consumption due to synchronous inputs is saved. To exit the self-refresh, supplying stable
CLK inputs, asserting DESEL or NOP command and then asserting CKE (REFSX) for longer than tSRX.
After tRC from REFSX all banks are in the idle state and a new command can be issued, but DESEL or NOP
commands must be asserted till then.
Self-Refresh
CLK
/CS
/RAS
/CAS
/WE
CKE
A0-11
BA0,1
Self Refresh Entry
Self Refresh Exit
X
00
Stable CLK
NOP
new command
tSRX
25
minimum tRC
+1 CLOCK
for recovery


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