LM5155QDSSRQ1 datasheet(17/47 Pages) TI1

Part #	LM5155QDSSRQ1

Description	2.2-MHz Wide Input Nonsynchronous Boost, SEPIC, Flyback Controller

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Manufacturer	TI1 [Texas Instruments]

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10

T

RT(TYPICAL)

2.21 10

R

955

f

u

VLOAD

Secondary Side

Soft-start

FB

COMP

SS

17

LM5155-Q1, LM51551-Q1

www.ti.com

SNVSAY4B – AUGUST 2018 – REVISED JULY 2019

Product Folder Links: LM5155-Q1 LM51551-Q1

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Feature Description (continued)

Figure 24. Primary-Side Soft-Start in Flyback

Figure 25 shows an implementation of secondary side soft-start in flyback topology.

Figure 25. Secondary-Side Soft-Start in Flyback

9.3.4 Switching Frequency (RT Pin)

The switching frequency of the device can be set by a single RT resistor connected between the RT and the

AGND pins. The resistor value to set the RT switching frequency (fRT) is calculated as shown in Equation 5.

(5)

The RT pin is regulated to 0.5 V by the internal RT regulator when the device is enabled.

9.3.5 Clock Synchronization (UVLO/SYNC Pin)

The switching frequency of the device can be synchronized to an external clock by pulling down the UVLO/SYNC

pin. The internal clock of the device is synchronized at the falling edge, but ignores the falling edge input during

the forced off-time which is determined by the maximum duty cycle limit. The external synchronization clock must

pull down the UVLO/SYNC pin voltage below 1.45 V (typical). The duty cycle of the pulldown pulse is not limited,

but the minimum pulldown pulse width must be greater than 150 ns, and the minimum pullup pulse width must be

greater than 250 ns. Figure 26 shows an implementation of the remote shutdown function. The UVLO pin can be

pulled down by a discrete MOSFET or an open-drain output of an MCU. In this configuration, the device stops

switching immediately after the UVLO pin is grounded, and the device shuts down 35 µs (typical) after the UVLO

pin is grounded.

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LM5155QDSSRQ1 Datasheet(PDF) 17 Page - Texas Instruments

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