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KS57P0504 Datasheet(PDF) 15 Page - Samsung semiconductor

Part # KS57P0504
Description  The KS57P0504 is the microcontroller which has 4 Kbyte one-time-programmable ROM and the functions are the same to KS57C0502/C0504
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Manufacturer  SAMSUNG [Samsung semiconductor]
Direct Link  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

KS57P0504 Datasheet(HTML) 15 Page - Samsung semiconductor

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KS57C0502/C0504/P0504 MICROCONTROLLER
ADDRESS SPACES
2–3
+
+ PROGRAMMING TIP — Defining Vectored Interrupt Areas
The following examples show you several ways you can define the vectored interrupt and instruction reference
areas in program memory:
1.
When all vector interrupts are used:
ORG
0000H
;
VENT0
1,0,RESET
;
EMB
← 1, ERB ← 0; Jump to RESET address
VENT1
0,0,INTB
;
EMB
← 0, ERB ← 0; Jump to INTB address
VENT2
0,0,INT0
;
EMB
← 0, ERB ← 0; Jump to INT0 address
VENT3
0,0,INT1
;
EMB
← 0, ERB ← 0; Jump to INT1 address
VENT4
0,0,INTS
;
EMB
← 0, ERB ← 0; Jump to INTS address
VENT5
0,0,INTT0
;
EMB
← 0, ERB ← 0; Jump to INTT0 address
2.
When a specific vectored interrupt such as INT0, and INTT0 is not used, the unused vector interrupt
locations must be skipped with the assembly instruction ORG so that jumps will address the correct
locations:
ORG
0000H
;
VENT0
1,0,RESET
;
EMB
← 1, ERB ← 0; Jump to RESET address
VENT1
0,0,INTB
;
EMB
← 0, ERB ← 0; Jump to INTB address
ORG
0006H
;
INT0 interrupt not used
VENT3
0,0,INT1
;
EMB
← 0, ERB ← 0; Jump to INT1 address
VENT4
0,0,INTS
;
EMB
← 0, ERB ← 0; Jump to INTS address
;
ORG
0010H
;
INTT0 interrupt not used
3.
If an INT0 interrupt is not used and if its corresponding vector interrupt area is not fully utilized, or if it is
not
written by a ORG instruction as in Example 2, a CPU malfunction will occur:
ORG
0000H
;
VENT0
1,0,RESET
;
EMB
← 1, ERB ← 0; Jump to RESET address
VENT1
0,0,INTB
;
EMB
← 0, ERB ← 0; Jump to INTB address
VENT3
0,0,INT1
;
EMB
← 0, ERB ← 0; Jump to INT0 address
VENT4
0,0,INTS
;
EMB
← 0, ERB ← 0; Jump to INT1 address
VENT5
0,0,INTT0
;
EMB
← 0, ERB ← 0; Jump to INTS address
;
ORG
0010H
;
General-purpose ROM area
;
In this example, when an INTS interrupt is generated, the corresponding vector area is not VENT4 INTS,
but VENT5 INTT0. This causes an INTS interrupt to jump incorrectly to the INTT0 address and causes a
CPU malfunction to occur.


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