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date 05/10/2019

│ page 6 of 11

CUI Inc

│ SERIES: PESE1-M │ DESCRIPTION: DC-DC CONVERTER

APPLICATION CIRCUIT

Figure 1

Single Output Models

EMC RECOMMENDED CIRCUIT

Table 3

Figure 3

Single Output Models

If you want to further reduce the input and output ripple, a filter capacitor may be connected to the input and output

terminals (Figures 1 & 2) provided that the capacitance is less than the maximum capacitive load of the model, otherwise

start-up problems may be caused if the capacitance is too large.

Recommended External Circuit Components

Vo (Vdc)

3.3, 5, 9

12, 15, 24

CY

--

1 nF / 4 kVdc

C3

refer to the Cout in Tables 1, 2

C1, C2

4.7 µF / 25 V

4.7 µF / 25 V

LDM

6.8 μH

6.8 μH

Figure 4

Dual Output Models

Figure 2

Dual Output Models

Table 1

Vin

(Vdc)

Cin

(μF)

Vo

(Vdc)

Cout

(μF)

5

4.7

3.3, 5

10

9

4.7

12

2.2

15

1

24

0.47

Table 2

Vin

(Vdc)

Cin

(μF)

Vo

(Vdc)

Cout

(μF)

5

4.7

±5

4.7

±9

2.2

±12, ±15,

±24

1

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