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AT77C105ACB08V- Datasheet(PDF) 2 Page - ATMEL Corporation |
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AT77C105ACB08V- Datasheet(HTML) 2 Page - ATMEL Corporation |
2 / 39 page 2 AT77C105A [Preliminary] 5419A–BIOM–01/05 Note: The die attach is connected to pin 6 and must be grounded. The FPL pin must also be grounded. Table 1. Pin Description for Chip-on-board Package: AT77C105A-CB08V Pin Number Name Type Description 1 Not connected 2 Not connected 3 Not connected 4 Not connected 5GNDD G Digital ground supply 6GNDA G Analog ground supply - connect to GNDD 7 VDDD P Digital power supply 8VDDA P Analog power supply - connect to VDD 9SCK I Serial Port Interface (SPI) clock 10 TESTA IO Reserved for the analog test, not connected 11 MOSI I Master-out slave-in data 12 VDD_IO P Input/output power supply - connect IO voltage compatibility accordingly 13 MISO O Master-in slave-out data 14 SCANEN I Reserved for the scan test in factory, must be grounded 15 SSS I Slow SPI slave select (active low 16 IRQ O Interrupt line to host (active low). Digital test pin 17 FSS I Fast SPI slave select (active low) 18 RST I Reset and sleep mode control (active high) 19 FPL I Front plane, must be grounded |
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