Electronic Components Datasheet Search |
|
GD25Q256DFER Datasheet(PDF) 76 Page - GigaDevice Semiconductor (Beijing) Inc. |
|
GD25Q256DFER Datasheet(HTML) 76 Page - GigaDevice Semiconductor (Beijing) Inc. |
76 / 89 page 3.3V Uniform Sector Dual and Quad Serial Flash GD25Q256D 76 8.6. AC CHARACTERISTICS Table 31. AC CHARACTERISTICS (T= -40℃~85℃, VCC=2.7~3.6V, CL=30pf) Symbol Parameter Min. Typ. Max. Unit. fC Serial Clock Frequency for all instructions except Read 104 MHz fC1 Serial Clock Frequency for Dual I/O (BBH, BCH), Quad I/O (EBH, ECH),Dual Output (3BH, 3CH), Quad Output (6BH, 6CH), Fast Read (0BH, 0CH) on 3.0 – 3.6V power supply 104 MHz fC2 Serial Clock Frequency for Dual I/O (BBH, BCH), Quad I/O (EBH, ECH), Dual Output (3BH, 3CH), Quad Output (6BH, 6CH), Fast Read (0BH, 0CH), on 2.7 – 3.0V power supply 80 MHz fR Serial Clock Frequency For: Read (03H, 13H) 50 MHz tCLH Serial Clock High Time 3.7 ns tCLL Serial Clock Low Time 3.7 ns tCLCH Serial Clock Rise Time (Slew Rate) 0.2 V/ns tCHCL Serial Clock Fall Time (Slew Rate) 0.2 V/ns tSLCH CS# Active Setup Time 8 ns tCHSH CS# Active Hold Time 5 ns tSHCH CS# Not Active Setup Time 5 ns tCHSL CS# Not Active Hold Time 5 ns tSHSL CS# High Time (Read/Write) 20 ns tSHQZ Output Disable Time 6 ns tCLQX Output Hold Time 1.8 ns tDVCH Data In Setup Time 2 ns tCHDX Data In Hold Time 2 ns tHLCH HOLD# Low Setup Time (Relative To Clock) 5 ns tHHCH HOLD# High Setup Time (Relative To Clock) 5 ns tCHHL HOLD# High Hold Time (Relative To Clock) 5 ns tCHHH HOLD# Low Hold Time (Relative To Clock) 5 ns tHLQZ HOLD# Low To High-Z Output 6 ns tHHQX HOLD# High To Low-Z Output 8 ns tCLQV Clock Low To Output Valid 7 ns tWHSL Write Protect Setup Time Before CS# Low 20 ns tSHWL Write Protect Hold Time After CS# High 100 ns tDP CS# High To Deep Power-Down Mode 20 μs tRES1 CS# High To Standby Mode Without Electronic Signature Read 30 μs tRES2 CS# High To Standby Mode With Electronic Signature Read 30 μs tSUS CS# High To Next Command After Suspend 20 μs tRS Latency Between Resume And Next Suspend 100 μs tRST CS# High To Next Command After Reset (Except From Erase) 30 μs tRST_E CS# High To Next Command After Reset (From Erase) 12 ms |
Similar Part No. - GD25Q256DFER |
|
Similar Description - GD25Q256DFER |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |