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HY5DU12822B Datasheet(PDF) 32 Page - Hynix Semiconductor

Part # HY5DU12822B
Description  512Mb DDR SDRAM
Download  37 Pages
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Manufacturer  HYNIX [Hynix Semiconductor]
Direct Link  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

HY5DU12822B Datasheet(HTML) 32 Page - Hynix Semiconductor

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Rev. 0.1 / May 2004
32
HY5DU12422B(L)TP
HY5DU12822B(L)TP
HY5DU121622B(L)TP
-Continue-
Parameter
Symbol
DDR333
DDR266
UNIT
NOTE
Min
Max
Min
Max
Input Setup Time (slow slew rate)
tIS
0.8
-
1.0
-
ns
2,4,5,6
Input Hold Time (slow slew rate)
tIH
0.8
-
1.0
-
ns
Input Pulse Width
tIPW
2.2
-
2.2
-
ns
6
Write DQS High Level Width
tDQSH
0.35
-
0.35
-
CK
Write DQS Low Level Width
tDQSL
0.35
-
0.35
-
CK
Clock to First Rising edge of DQS-In
tDQSS
0.75
1.25
0.72
1.28
CK
DQS falling edge to CK setup time
tDSS
0.2
0.2
CK
DQS falling edge hold time from CK
tDSH
0.2
0.2
CK
Data-In Setup Time to DQS-In
(DQ & DM)
tDS
0.45
-
0.5
-
ns
6,7,11,
12,13
Data-in Hold Time to DQS-In
(DQ & DM)
tDH
0.45
-
0.5
-
ns
DQ & DM Input Pulse Width
tDIPW
1.75
-
1.75
-
ns
Read DQS Preamble Time
tRPRE
0.9
1.1
0.9
1.1
CK
Read DQS Postamble Time
tRPST
0.4
0.6
0.4
0.6
CK
Write DQS Preamble Setup Time
tWPRES
0-0
-
CK
Write DQS Preamble Hold Time
tWPREH
0.25
-
0.25
-
CK
Write DQS Postamble Time
tWPST
0.4
0.6
0.4
0.6
CK
Mode Register Set Delay
tMRD
2-2
-
CK
Exit Self Refresh to Any Execute
Command
tXSC
200
-
200
-
CK
8
Average Periodic Refresh Interval
tREFI
-7.8
-
7.8
us


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