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HY5DU12822B Datasheet(PDF) 14 Page - Hynix Semiconductor

Part # HY5DU12822B
Description  512Mb DDR SDRAM
Download  37 Pages
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Manufacturer  HYNIX [Hynix Semiconductor]
Direct Link  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

HY5DU12822B Datasheet(HTML) 14 Page - Hynix Semiconductor

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Rev. 0.1 / May 2004
14
HY5DU12422B(L)TP
HY5DU12822B(L)TP
HY5DU121622B(L)TP
OPERATION COMMAND TRUTH TABLE-IV
Note :
1. H - Logic High Level, L - Logic Low Level, X - Don’t Care, V - Valid Data Input,
BA - Bank Address, AP - AutoPrecharge Address, CA - Column Address, RA - Row Address, NOP - NO Operation.
2. All entries assume that CKE was active(high level) during the preceding clock cycle.
3. If both banks are idle and CKE is inactive(low level), then in power down mode.
4. Illegal to bank in specified state. Function may be legal in the bank indicated by Bank Address(BA) depending on the state of
that bank.
5. If both banks are idle and CKE is inactive(low level), then self refresh mode.
6. Illegal if tRCD is not met.
7. Illegal if tRAS is not met.
8. Must satisfy bus contention, bus turn around, and/or write recovery requirements.
9. Illegal if tRRD is not met.
10. Illegal for single bank, but legal for other banks in multi-bank devices.
11. Illegal for all banks.
Current
State
/CS
/RAS
/CAS
/WE
Address
Command
Action
WRITE
L
H
L
L
BA, CA, AP
WRITE/WRITEAP
ILLEGAL11
LL
H
H
BA, RA
ACT
ILLEGAL11
LL
H
L
BA, AP
PRE/PALL
ILLEGAL11
LL
L
H
X
AREF/SREF
ILLEGAL11
LL
L
L
OPCODE
MRS
ILLEGAL11
MODE
REGISTER
ACCESSING
H
X
X
X
X
DSEL
NOP - Enter IDLE after tMRD
L
H
H
H
X
NOP
NOP - Enter IDLE after tMRD
LH
H
L
X
BST
ILLEGAL11
L
H
L
H
BA, CA, AP
READ/READAP
ILLEGAL11
L
H
L
L
BA, CA, AP
WRITE/WRITEAP
ILLEGAL11
LL
H
H
BA, RA
ACT
ILLEGAL11
LL
H
L
BA, AP
PRE/PALL
ILLEGAL11
LL
L
H
X
AREF/SREF
ILLEGAL11
LL
L
L
OPCODE
MRS
ILLEGAL11


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