NCP1200

http://onsemi.com

9

Power Dissipation

The NCP1200 is directly supplied from the DC rail

through the internal DSS circuitry. The current flowing

through the DSS is therefore the direct image of the

NCP1200 current consumption. The total power dissipation

If we

operate the device on a 250 VAC rail, the maximum rectified

voltage can go up to 350 VDC. As a result, the worse case

dissipation occurs on the 100 kHz version which will

dissipate 340 . 1.8 mA@Tj = −25

°C = 612 mW (however

this 1.8 mA number will drop at higher operating

is based on a 1 nF capacitor loading pin 5. As seen before,

package offers a junction−to−ambient thermal resistance

thus be computed knowing the maximum operating

ambient temperature (e.g. 70

°C) together with the

maximum

allowable

junction

temperature

(125

°C):

Pmax

+

T

R

R

qJ*A

= 550 mW. As we can see, we do not

reach the worse consumption budget imposed by the 100

kHz version. Two solutions exist to cure this trouble. The

first one consists in adding some copper area around the

NCP1200 DIP8 footprint. By adding a min−pad area of 80

which allows the use of the 100 kHz version. The other

solutions are:

1. Add a series diode with pin 8 (as suggested in the

above lines) to drop the maximum input voltage

down to 222 V ((2

350)/pi) and thus dissipate

less than 400 mW

2. Implement a self−supply through an auxiliary

winding to permanently disconnect the self−supply.

the DIP8 package: 178

°C/W. Again, adding some copper

area around the PCB footprint will help decrease this

with 35

m copper thickness (1 oz.) or 6.5 mm x 6.5 mm with

70

m copper thickness (2 oz.). One can see, we do not

recommend using the SOIC package for the 100 kHz version

with DSS active as the IC may not be able to sustain the

power (except if you have the adequate place on your PCB).

However, using the solution of the series diode or the

self−supply through the auxiliary winding does not cause

any problem with this frequency version. These options are

thoroughly described in the AND8023/D.

Overload Operation

In applications where the output current is purposely not

controlled (e.g. wall adapters delivering raw DC level), it is

interesting to implement a true short−circuit protection. A

short−circuit actually forces the output voltage to be at a low

level, preventing a bias current to circulate in the

optocoupler LED. As a result, the FB pin level is pulled up

to 4.1 V, as internally imposed by the IC. The peak current

setpoint goes to the maximum and the supply delivers a

rather high power with all the associated effects. Please note

that this can also happen in case of feedback loss, e.g. a

broken optocoupler. To account for this situation, the

NCP1200 hosts a dedicated overload detection circuitry.

Once activated, this circuitry imposes to deliver pulses in a

burst manner with a low duty cycle. The system recovers

when the fault condition disappears.

During the startup phase, the peak current is pushed to the

maximum until the output voltage reaches its target and the

feedback loop takes over. This period of time depends on

normal output load conditions and the maximum peak

current allowed by the system. The time−out used by this IC

device internally watches for an overload current situation.

controller stops the driving pulses, prevents the self−supply

current source to restart and puts all the circuitry in standby,

consuming as little as 350

this level crosses 6.3 V typical, the controller enters a new

toward 11.4 V and again delivers output pulses at the

its normal operation. Otherwise, a new fault cycle takes

place. Figure 20 shows the evolution of the signals in

presence of a fault.