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LTC1709-7 Datasheet(PDF) 3 Page - Linear Technology |
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LTC1709-7 Datasheet(HTML) 3 Page - Linear Technology |
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3 LTC1709-7 ELECTRICAL CHARACTERISTICS The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 15V, VBIAS = 5V, VRUN/SS = 5V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS IQ Input DC Supply Current (Note 5) Normal Mode EXTVCC Tied to VOUT, VOUT = 5V 470 µA Shutdown VRUN/SS = 0V 20 40 µA IRUN/SS Soft-Start Charge Current VRUN/SS = 1.9V – 0.5 –1.2 µA VRUN/SS RUN/SS Pin ON Arming VRUN/SS Rising 1.0 1.5 1.9 V VRUN/SSLO RUN/SS Pin Latchoff Arming VRUN/SS Rising from 3V 4.1 4.5 V ISCL RUN/SS Discharge Current Soft Short Condition VEAIN = 0.5V, VRUN/SS = 4.5V 0.5 2 4 µA ISDLHO Shutdown Latch Disable Current VEAIN = 0.5V 1.6 5 µA ISENSE Total Sense Pins Source Current Each Channel: VSENSE1–, 2– = VSENSE1+, 2+ = 0V – 85 – 60 µA DFMAX Maximum Duty Factor In Dropout 98 99.5 % Top Gate Transition Time: (Note 6) TG1, 2 tr Rise Time CLOAD = 3300pF 30 90 ns TG1, 2 tf Fall Time CLOAD = 3300pF 40 90 ns Bottom Gate Transition Time: (Note 6) BG1, 2 tr Rise Time CLOAD = 3300pF 30 90 ns BG1, 2 tf Fall Time CLOAD = 3300pF 20 90 ns TG/BG t1D Top Gate Off to Bottom Gate On Delay CLOAD = 3300pF Each Driver (Note 6) 90 ns Synchronous Switch-On Delay Time BG/TG t2D Bottom Gate Off to Top Gate On Delay CLOAD = 3300pF Each Driver (Note 6) 90 ns Top Switch-On Delay Time tON(MIN) Minimum On-Time Tested with a Square Wave (Note 7) 180 ns Internal VCC Regulator VINTVCC Internal VCC Voltage 6V < VIN < 30V, VEXTVCC = 4V 4.8 5.0 5.2 V VLDO INT INTVCC Load Regulation ICC = 0 to 20mA, VEXTVCC = 4V 0.2 1.0 % VLDO EXT EXTVCC Voltage Drop ICC = 20mA, VEXTVCC = 5V 80 160 mV VEXTVCC EXTVCC Switchover Voltage ICC = 20mA, EXTVCC Ramping Positive q 4.5 4.7 V VLDOHYS EXTVCC Switchover Hysteresis ICC = 20mA, EXTVCC Ramping Negative 0.2 V VID Parameters VBIAS Operating Supply Voltage Range 2.7 5.5 V RATTEN Resistance Between ATTENIN 10 k Ω and ATTENOUT Pins ATTENERR Resistive Divider Error q – 0.25 – 0.25 % RPULLUP VID0 to VID4 Pull-Up Resistance (Note 8) 40 k Ω VIDTHLOW VID0 to VID4 Logic Threshold Low 0.4 V VIDTHHIGH VID0 to VID4 Logic Threshold High 1.6 V VIDLEAK VID0 to VID4 Leakage VBIAS < VID0–VID4 < 7V 1 µA Oscillator and Phase-Locked Loop fNOM Nominal Frequency VPLLFLTR = 1.2V 190 220 250 kHz fLOW Lowest Frequency VPLLFLTR = 0V 120 140 160 kHz fHIGH Highest Frequency VPLLFLTR ≥ 2.4V 280 310 360 kHz RPLLIN PLLIN Input Resistance 50 k Ω IPLLFLTR Phase Detector Output Current Sinking Capability fPLLIN < fOSC –15 µA Sourcing Capability fPLLIN > fOSC 15 µA RRELPHS Controller 2-Controller 1 Phase 180 Deg |
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