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MAX5855 Datasheet(PDF) 97 Page - Maxim Integrated Products

Part No. MAX5855
Description  16-Bit, 4.9Gsps Wideband Interpolating and Modulating RF DAC with JESD204B Interface
Download  128 Pages
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Maker  MAXIM [Maxim Integrated Products]
Homepage  http://www.maxim-ic.com
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MAX5855 Datasheet(HTML) 97 Page - Maxim Integrated Products

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BIT
15
14
13
12
11
10
9
8
Field
Reset
Access
Type
BIT
7
6
5
4
3
2
1
0
Field
LID[4:0]
LnRst
Reset
0x0
0x0
Access
Type
Write, Read
Write, Read
BITFIELD
BITS
DESCRIPTION
DECODE
LnSrc
31:27
Physical Rx Lane number sourced for Logical
Rx Lane at lane-to-sample mapping
LkSel
25
ILA Lock Select Control
0: Lane is excluded from ILA process
1: Lane is included in ILA process based on FIFO
write start,
ILA is performed in subclass 0 by
waiting for FIFO writes on all Lanes with this bit
set
LnEn
24
Rx Lane Enable Control
0: Rx Lane is Disabled
1: Rx Lane is Enabled
LID
5:1
Lane ID for used for ILA sequence checking
LnRst
0
Lane reset control
0: Rx Lane is not in reset
1: Rx Lane is in reset
CfgRLaneIntEn (0x484, 0x494, 0x4A4, 0x4B4, 0x4C4)
Configure Rx Lane Interrupt Enables
BIT
31
30
29
28
27
26
25
24
Field
DContErr
PRBSerr
KContErr
FChkErr
LCfgErr
ILAerr
Reset
0x0
0x0
0x0
0x0
0x0
0x0
Access
Type
Write, Read
Write, Read
Write, Read
Write, Read
Write, Read
Write, Read
BIT
23
22
21
20
19
18
17
16
Field
FIFOempty
FIFOfull
Reset
0x0
0x0
Access
Type
Write, Read
Write, Read
BIT
15
14
13
12
11
10
9
8
Field
Reset
Access
Type
MAX5855
16-Bit, 4.9Gsps Wideband Interpolating
and Modulating RF DAC with JESD204B Interface
www.maximintegrated.com
Maxim Integrated | 97


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