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MAX33250EELC Datasheet(PDF) 2 Page - Maxim Integrated Products |
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MAX33250EELC Datasheet(HTML) 2 Page - Maxim Integrated Products |
2 / 14 page Absolute Maximum Ratings VCCA to GNDA ......................................................... -0.3V to +6V VCCB to GNDB ......................................................... -0.3V to +6V T_IN to GNDA .......................................................... -0.3V to +6V T_OUT to GNDB ............................................................... ±13.2V R_IN to GNDB ...................................................................... ±25V R_OUT to GNDA ...................................................... -0.3V to +6V Short-Circuit Duration (T_OUT to GNDB) .................. Continuous Short-Circuit Duration (R_OUT to GNDA) .................. Continuous Side A (VCCA, T1IN, T2IN, R1OUT, R2OUT) to GNDA ESD±2kV Side B (VCCB) to GNDB ESD ...............................................±2kV Side B (T1OUT, T2OUT, R1IN, R2IN) to GNDB ESD HBM±15kV Continuous Power Dissipation (Single Layer Board) (TA = +70°C, derate 10mW/°C above +70°C.) ...........................510mW Continuous Power Dissipation (Multilayer Board) (TA = +70°C, derate 10mW/°C above +70°C.) ...........................700mW Operating Temperature Range .............................-40°C to +85°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Package Information LGA-12 Package Code L1266M+1 Outline Number 21-100222 Land Pattern Number 90-100078 Thermal Resistance, Single-Layer Board: Junction-to-Ambient (θJA) 157°C/W Junction-to-Case Thermal Resistance (θJC) 31°C/W Thermal Resistance, Four-Layer Board: Junction-to-Ambient (θJA) 115°C/W Junction-to-Case Thermal Resistance (θJC) 31°C/W For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/ thermal-tutorial. MAX33250E/MAX33251E 600V Isolated 2Tx/2Rx and 1Tx/1Rx RS-232 Transceiver with ±15kV ESD and Integrated Capacitors www.maximintegrated.com Maxim Integrated | 2 |
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