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PM29F004 Datasheet(PDF) 5 Page - PMC-Sierra, Inc

Part No. PM29F004
Description  4 Megabit (512K X 8) 5.0 Volt-Only CMOS Flash Memory
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Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM29F004 Datasheet(HTML) 5 Page - PMC-Sierra, Inc

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Programmable Microelectronics Corp.
Issue Date: November, 2000 Rev: 1.0
PMC
Pm29F004 Preliminary
BLOCK DIAGRAM
DEVICE OPERATION
READ OPERATION
The access of Pm29F004 is similar as that of
EPROM. To obtain data at the outputs, three control
functions must be satisfied:
• CE# is the chip enable and should be pulled low
( VIL ).
• OE# is the output enable and should be pulled
low ( VIL).
• WE# is the write enable and should remains high
( VIH ).
BOOT BLOCK LOCKOUT
The device has a software lockout feature to pre-
vent the data in the boot block from being erased or
reprogrammed. The boot block can be located at the
top or bottom of the address location. The block size is
16 Kbytes. Once the lockout feature is enable, the boot
block can not be erased or reprogrammed. Data in the
main memory block can still be updated through the
regular programming method. The boot block lockout
feature can be turned on by issuing a six-bus-cycle com-
mand sequence. Please refer to Table 4 and Chart 4.
BOOT BLOCK LOCKOUT DETECTION
The state of the Boot Block lockout can be de-
tected by software product identification entry. After
entry, selects Boot Block address with A0 = “0” and A1
= “1” and then read I/O0. A data of “0” means the lock-
out feature is disabled and the Boot Block can be erased
or programmed. A data of “1” means the lockout fea-
ture is enabled and the Boot Block is protected. Prod-
uct identification exit must be executed before the de-
vice returns to read mode.
PRODUCT IDENTIFICATION
The product identification mode can be used to identify
the device and the manufacturer by hardware or soft-
ware operation. The hardware operation mode is acti-
vated by applying a 12.0 Volt on A9 pin, typically used
by an external programmer to select the right program-
ming algorithm for the device. For detail, please see
Bus Operation Modes in Table 3. The software opera-
tion mode is activated by three-bus-cycle command.
Please see Software Command Definition in Table 4.
5
WE#
CE#
OE#
COMMAND
REGISTER
CE,OE LOGIC
A0-A18
ERASE/PROGRAM
VOLTAGE
GENERATOR
HIGH VOLTAGE
SWITCH
I/O0-I/O7
I/O BUFFERS
DATA
LATCH
SENSE
AMP
Y-GATING
MEMORY
ARRAY
Y-DECODER
X-DECODER


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