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GS12081 Datasheet(PDF) 19 Page - Semtech Corporation |
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GS12081 Datasheet(HTML) 19 Page - Semtech Corporation |
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19 / 64 page  GS12081 Final Data Sheet Rev.6 PDS-061305 January 2019 19 of 64 Semtech Proprietary & Confidential www.semtech.com 4.3 Output Drivers The GS12081 features two independently configurable output drivers (see Figure 3-2). The two drivers provide highly configurable amplitude and pre-emphasis control. The signal on the outputs can be inverted to help with signal polarity when layout requires trace inversion. The LOS (Loss of Signal) status from the equalizer stage can be used to automatically mute or disable the outputs on their assertion. The cable drivers can be configured to mute or disable during sleep. The sleep control modes take precedence over the manual or automatic LOS output control modes. Note: The <n> in the control parameter names refers to the output number. Output 0 is the cable driver output SDO0/SDO0, and output 1 is the cable driver output SDO1/SDO1. 4.3.1 Output Driver Polarity Inversion The signal polarity may be inverted at the outputs through the CTRL_OUTPUT<n>_ DATA_ INVERT parameters in register 0x48. This may be useful to compensate for an inverted upstream signal or to facilitate board signal routing. To invert the polarity of either of the two output drivers, write 1b to control parameter CTRL_OUTPUT<n>_DATA_ INVERT. 4.3.2 Output Driver Data Rate Selection By default the GS12081 will use the 6G/12G output driver and slew rate group settings for all data rates. If the application will be using data rates other than 6G/12G, it is recommended that specific data rate group settings are used at all times for optimal performance. To use specific data rate group settings, the host will need to set CTRL_OUTPUT<n>_MANUAL_SLEW to the required rate group. The slew rate options are as follows: 0 = SD/MADI 1 = HD/3G 2 = 6G/12G (default) Note: It is recommended to enable offset correction for rates HD through 12G to minimize output jitter. This is done by setting CFG_OFFSET_MANUAL_ENA = 1 in register 0x1B. |
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