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GS12081 Datasheet(PDF) 45 Page - Semtech Corporation |
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GS12081 Datasheet(HTML) 45 Page - Semtech Corporation |
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45 / 64 page  GS12081 Final Data Sheet Rev.6 PDS-061305 January 2019 45 of 64 Semtech Proprietary & Confidential www.semtech.com 1D RSVD RSVD 15:0 R/W 0 Reserved - do not modify. 1E TREQ0_ INPUT_BOOST RSVD 15:5 R/W 0 Reserved - do not modify. CFG_TREQ0_BOOST 4:1 R/W 2 Trace equalizer boost setting for TEQ (Trace Equalizer): 0 = Bypass equalization stage 1 to 8 = 1 to 17dB of insertion loss at 5.94GHz (see Figure 4-1). Bypass is the minimum boost setting; boost 8 is maximum boost setting. CFG_TREQ0_ CD_BOOST 0R/W 0 Selects boost level applied to DDI input signal for carrier detection function only. 0 = Sets to boost 8 (See Figure 4-1) 1 = Use CFG_TREQ0_BOOST setting 1F TREQ0_CD_ HYSTERESIS RSVD 15:8 R/W 0 Reserved - do not modify. CFG_TREQ0_CD_ ASSERT_THRESH 7:4 R/W 4 Sets assert threshold for trace equalizer carrier detect 0 to15d, where 0 is minimum threshold and 15d is maximum threshold (see Figure 4-2). CFG_TREQ0_CD_ DEASSERT_THRESH 3:0 R/W 3 Sets deassert threshold for trace equalizer carrier detect 0 to15d, where 0 is minimum threshold and 15d is maximum threshold (see Figure 4-2). 20 RSVD RSVD 15:0 R/W 3 Reserved - do not modify. 21 RSVD RSVD 15:0 R/W F Reserved - do not modify. 22 RSVD RSVD 15:0 R/W 3FF Reserved - do not modify. 23 to 25 RSVD RSVD 15:0 R/W 0 Reserved - do not modify. Table 5-3: Control Register Descriptions (Continued) Addressh Register Name Parameter Name Bit Slice R/W Reset Valueh Description |
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