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NT6DM32M16BD Datasheet(PDF) 67 Page - Nanya Technology Corporation. |
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NT6DM32M16BD Datasheet(HTML) 67 Page - Nanya Technology Corporation. |
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67 / 81 page  LPDDR 512Mb SDRAM NT6DM32M16BD / NT6DM16M32BC Version 1.4 67 Nanya Technology Corporation © 01/2016 All Rights Reserved Data for any Write burst may be truncated by a subsequent READ command as shown in Figure. Note that the only data-in pairs that are registered prior to the tWTR period are written to the internal array, and any subsequent data-in must be masked with DM. Interrupting Write-to-Read (nominal, tDQSS(min)/(max), BL=4) Notes: 1. Din b = data-in from column b; Dout n = data-out for column n. 2. An uninterrupted burst of 4 is shown; two data elements are written. 3. tWTR is referenced from the first positive CK edge after the last data-in pair. 4. A10 is LOW with the WRITE command (auto precharge is disabled). 5. DQS is required at T2 and T2n (nominal case) to register DM. |
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