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NT5TU32M16EG-ACI Datasheet(PDF) 34 Page - Nanya Technology Corporation. |
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NT5TU32M16EG-ACI Datasheet(HTML) 34 Page - Nanya Technology Corporation. |
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34 / 98 page  DDR2 512Mb SDRAM NT5TU64M8EE / NT5TU32M16EG 34 Version 1.6 Nanya Technology Corp.© 08/2015 All Rights Reserved Precharge Command The Precharge Command is used to precharge or close a bank that has been activated. The Precharge Command is triggered when CS, RAS and WE are low and CAS is high at the rising edge of the clock. The Pre-charge Command can be used to precharge each bank independently or all banks simultaneously. Three address bits A10, BA0, and BA1 are used to define which bank to precharge when the command is issued. Bank Selection for Precharge by Address Bit A10 BA1 BA0 Precharge Bank(s) LOW LOW LOW Bank 0 only LOW LOW HIGH Bank 1 only LOW HIGH LOW Bank 2 only LOW HIGH HIGH Bank 3 only HIGH Don't Care Don't Care All banks Burst Read Operation Followed by a Precharge Minimum Read to Precharge command spacing to the same bank = AL + BL/2 + max (RTP, 2) - 2 clocks. For the earliest possible precharge, the Precharge command may be issued on the rising edge which is “Additive Latency (AL) + BL/2 clocks” after a Read Command, as long as the minimum tRAS timing is satisfied. The minimum Read to Precharge spacing has also to satisfy a minimum analog time from the rising clock edge that initiates the last 4-bit prefetch of a Read to Precharge command. This time is call tRTP (Read to Precharge). For BL=4 this is the time from the actual read (AL after the Read command) to Precharge command. For BL=8 this is the time from AL + 2 clocks after the Read to the Precharge command. |
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