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TMS29F800T Datasheet(PDF) 3 Page - Texas Instruments

Part No. TMS29F800T
Description  1048576 BY 8-BIT/ 524288 BY 16-BIT FLASH MEMORIES
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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TMS29F800T Datasheet(HTML) 3 Page - Texas Instruments

 
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TMS29F800T, TMS29F800B
1048576 BY 8-BIT/ 524288 BY 16-BIT
FLASH MEMORIES
SMJS835B – MAY 1997 – REVISED OCTOBER 1997
3
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
48-PIN TSOP
DCD PACKAGE
(TOP VIEW)
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48
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44
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A15
A14
A13
A12
A11
A10
A9
A8
NC
NC
WE
RESET
NC
NC
RY / BY
A18
A17
A7
A6
A5
A4
A3
A2
A1
A16
BYTE
VSS
DQ15 / A–1
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
VCC
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
OE
VSS
CE
A0
description (continued)
Device operations are selected by writing JEDEC-standard commands into the command register using
standard microprocessor write timings. The command register acts as an input to an internal-state machine
which interprets the commands, controls the erase and programming operations, outputs the status of the
device, outputs the data stored in the device, and outputs the device algorithm-selection code. On initial power
up, the device defaults to the read mode. A hardware-reset pin initializes the internal-state machine to the read
operation.
The device has low power dissipation with a 40-mA active read for the byte mode, 50-mA active read for the
word mode, 60-mA typical program/erase current mode, and less than 100-
mA standby current with a 5-mA
deep-power-down mode. These devices are offered with 80-, 90-, 100-, and 120-ns access times. Table 1 and
Table 2 show the sector-address ranges. The TMS29F800T/B is offered in a 44-pin plastic small-outline
package (PSOP) (DBJ suffix) and a 48-pin thin small-outline package (TSOP) (DCD suffix).


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