Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

HM51W16165 Datasheet(PDF) 6 Page - Hitachi Semiconductor

Part No. HM51W16165
Description  16 M EDO DRAM (1-Mword 16-bit) 4 k Refresh/1 k Refresh
Download  36 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  HITACHI [Hitachi Semiconductor]
Direct Link  http://www.renesas.com/eng
Logo HITACHI - Hitachi Semiconductor

HM51W16165 Datasheet(HTML) 6 Page - Hitachi Semiconductor

Back Button HM51W16165 Datasheet HTML 2Page - Hitachi Semiconductor HM51W16165 Datasheet HTML 3Page - Hitachi Semiconductor HM51W16165 Datasheet HTML 4Page - Hitachi Semiconductor HM51W16165 Datasheet HTML 5Page - Hitachi Semiconductor HM51W16165 Datasheet HTML 6Page - Hitachi Semiconductor HM51W16165 Datasheet HTML 7Page - Hitachi Semiconductor HM51W16165 Datasheet HTML 8Page - Hitachi Semiconductor HM51W16165 Datasheet HTML 9Page - Hitachi Semiconductor HM51W16165 Datasheet HTML 10Page - Hitachi Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 36 page
background image
HM51W16165 Series, HM51W18165 Series
6
RAS
LCAS
UCAS
WE
OE
Output
Operation
H
D
D
D
D
Open
Standby
L
L
H
H
L
Valid
Lower byte Read cycle
L
H
L
H
L
Valid
Upper byte
L
L
L
H
L
Valid
Word
LL
H
L*
2
D
Open
Lower byte Early write cycle
LH
LL*
2
D
Open
Upper byte
LL
LL*
2
D
Open
Word
LL
H
L*
2
H
Undefined
Lower byte Delayed write cycle
LH
LL*
2
H
Undefined
Upper byte
LL
LL*
2
H
Undefined
Word
L
L
H
H to L
L to H
Valid
Lower byte Read-modify-write cycle
L
H
L
H to L
L to H
Valid
Upper byte
L
L
L
H to L
L to H
Valid
Word
L
H
H
D
D
Open
Word
RAS-only refresh cycle
H to L
H
L
D
D
Open
Word
CAS-before-RAS refresh cycle or
H to L
L
H
D
D
Open
Word
Self refresh cycle (L-version)
H to L
L
L
D
D
Open
Word
L
L
L
H
H
Open
Read cycle (Output disabled)
Notes: 1. H: High (inactive) L: Low (active) D: H or L
2. t
WCS ≥ 0 ns
Early write cycle
t
WCS < 0 ns
Delayed write cycle
3. Mode is determined by the OR function of the
UCAS and LCAS. (Mode is set by the earliest of
UCAS and LCAS active edge and reset by the latest of UCAS and LCAS inactive edge.)
However write OPERATION and output HIZ control are done independently by each
UCAS,
LCAS.
ex. if
RAS = H to L, UCAS = H, LCAS = L, then CAS-before-RAS refresh cycle is selected.
This Material Copyrighted By Its Respective Manufacturer


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36 


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn