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DM54S194 Datasheet(PDF) 3 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part No. DM54S194
Description  4-Bit Bidirectional Universal Shift Registers
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Maker  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com
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DM54S194 Datasheet(HTML) 3 Page - National Semiconductor (TI)

   
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Switching Characteristics at VCC e 5V and TA e 25 C (See Section 1 for Test Waveforms and Output Load)
From (Input)
RL e 280X
Symbol
Parameter
To (Output)
CL e 15 pF
CL e 50 pF
Units
Min
Max
Min
Max
fMAX
Maximum Clock Frequency
70
60
MHz
tPLH
Propagation Delay Time
Clock
12
15
ns
Low to High Level Output
to Q
tPHL
Propagation Delay Time
Clock
165
20
ns
High to Low Level Output
to Q
tPHL
Propagation Delay Time
Clear
185
23
ns
High to Low Level Output
to Q
Function Table
Inputs
Outputs
Clear
Mode
Clock
Serial
Parallel
QA
QB
QC
QD
S1
S0
Left
Right
A
B
C
D
LX
X
X
X
X
X
X
X
X
L
L
L
L
HX
X
L
X
X
X
X
X
X
QA0
QB0
QC0
QD0
HH
H
u
XX
a
b
c
d
a
b
c
d
HL
H
u
XH
X
X
X
X
H
QAn
QBn
QCn
HL
H
u
XL
X
X
X
X
L
QAn
QBn
QCn
HH
L
u
HX
X
X
X
X
QBn
QCn
QDn
H
HH
L
u
LX
X
X
X
X
QBn
QCn
QDn
L
HL
L
X
X
X
X
X
X
X
QA0
QB0
QC0
QD0
H e High Level (steady state) L e Low Level (steady state) X e Don’t Care (any input including transitions)
u e Transition from low to high level
a b c d e The level of steady state input at inputs A B C or D respectively
QA0 QB0 QC0 QD0 e The level of QA QB QC orQD respectively before the indicated steady state input conditions were established
QAn QBn QCn QDn e The level of QA QB QC respectively before the most recent
u transition of the clock
Logic Diagram
S194
TLF6475 – 2
3


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