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CY28408 Datasheet(PDF) 6 Page - Cypress Semiconductor

Part No. CY28408
Description  Clock Synthesizer with Differential CPU Outputs
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Maker  CYPRESS [Cypress Semiconductor]
Homepage  http://www.cypress.com
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CY28408 Datasheet(HTML) 6 Page - Cypress Semiconductor

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CY28408
Document #: 38-07617 Rev. **
Page 6 of 19
Spread Spectrum Clock Generation (SSCG)
Spread Spectrum is a modulation technique used to
minimizing EMI reduction generated by repetitive digital
signals. A clock presents the generated EMI energy at the
center frequency it is generating. Spread Spectrum distributes
this energy over a specific and controlled frequency bandwidth
therefore causing the average energy at any point in this band
to decrease in value. This technique is achieved by modulating
the clock away from its resting frequency by a certain
percentage (which also determines the amount of EMI
reduction). In this device, Spread Spectrum is enabled by
setting specific register bits in the SMBus control bytes.
Table 5 is a listing of the modes and percentages of Spread
Spectrum modulation that this device incorporates.
Byte 4: 3V66 Control Register (all bits are read- and write-functional)
Bit
@Pup
Name
Description
7
0
SS2 Spread Spectrum control bit (0 = down spread, 1 = center spread)
60
Reserved
5
1
3V66_0
3V66_0 Output Enabled,
1 = enabled, 0 = disabled
4
1
3V66_1/VCH
3V66_1/VCH Output Enable
1 = enabled, 0 = disabled
3
1
3V66_5
3V66_5 Output Enable
1 = enabled, 0 = disabled
2
1
3V66_4
3V66_4 Output Enabled
1 = enabled, 0 = disabled
1
1
3V66_3
3V66_3 Output Enabled
1 = enabled, 0 = disabled
0
1
3V66_2
3V66_2 Output Enabled
1 = enabled, 0 = disabled
Byte 5: Spread Spectrum Control Register (all bits are read and write functional)
Bit
@Pup
Name
Description
7
0
SS1 Spread Spectrum control bit
6
1
SS0 Spread Spectrum control bit
50
Reserved
40
Reserved
30
Reserved
2
0
48M_DOT edge rate control. When set to 1, the edge is slowed by 40%.
10
Reserved
0
0
USB edge rate control. When set to 1, the edge is slowed by 40%.
Table 5. Spread Spectrum
SS2
SS1
SS0
Spread Mode
Spread%
0
0
0
Down
+0.00, –0.25
0
0
1
Down
+0.00, –0.50
0
1
0
Down
+0.00, –0.75
0
1
1
Down
+0.00, –1.00
1
0
0
Center
+0.13, –0.13
1
0
1
Center
+0.25, –0.25
1
1
0
Center
+0.37, –0.37
1
1
1
Center
+0.50, –1.50
Byte 6: Silicon Signature Register (all bits are read-only)
Bit
@Pup
Name
Description
7
0
Revision ID Bit 3
Revision ID Bit 3
6
0
Revision ID Bit 2
Revision ID Bit 2
5
0
Revision ID Bit 1
Revision ID Bit 1
4
0
Revision ID Bit 0
Revision ID Bit 0
3
1
Vendor ID Bit 3
Vendor ID Bit 3
2
0
Vendor ID Bit 2
Vendor ID Bit 2
1
0
Vendor ID Bit 1
Vendor ID Bit 1
0
0
Vendor ID Bit 0
Vendor ID Bit 0


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