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MSM9810 Datasheet(PDF) 5 Page - OKI electronic componets |
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MSM9810 Datasheet(HTML) 5 Page - OKI electronic componets |
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5 / 32 page  5/31 ¡ Semiconductor MSM9810 LDA0 O LEFT side D/A output pin. RDA0 O RIGHT side D/A output pin. XT I Crystal or ceramic oscillator connection pin. A feedback resistor of about 1MW is connected between XT and XT. If necessary, enter external clocks into this pin. XT O Crystal or ceramic oscillator connection pin. When external clocks are used, leave this pin open. Data bus pin for CPU interface when parallel input interface is selected. When WR is "L", this pin serves as data input pin. When RD is "L", this pin serves as channel status output pin. When serial input interface is selected, this pin serves as channel status output pin. When UD is "H", channels 8 thru 5 are output to SR3 thru SR0, respectively. When UD is "L", channels 4 thru 1 are output to SR3 thru SR0, respectively. D0/SR0 I/O D1/SR1 D2/SR2 D3/SR3 When this pin is "L" level, the LSI is initialized. At that time, oscillation stopsand D/A outputs go to GND level. RESET I NCR/BUSY I Channel status select pin. When this pin is "H", NCR signal is output. When it is "L", BUSY signal is output. TEST1 I Pins for IC testing. Apply "L" level to these pins. Pull-down resistors are internally connected to these pins. DVDD — Power supply pin. DGND — GND pin. 24 23 22 21 4 5 11 12 29 19 9 7, 48 1, 32 TEST2 AVDD AGND 10 6 2 TEST3 13 Symbol Type Description Pin TEST4 3 I Pins for IC testing. Apply "L" level to these pins. D4/UD I/O Data bus pin for CPU interface when parallel input interface is selected. When WR is "L", this pin serves as data input pin. When RD is "L", this pin serves as channel status output pin. When serial input interface is selected, this pin serves as channel status selecter pin. When UD is "H", channels 8 thru 5 are output to SR3 thru SR0, respectively. When UD is "L", channels 4 thru 1 are output to SR3 thru SR0, respectively. 25 |
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