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SUR50N03-12P-E3 Datasheet(PDF) 1 Page - Vishay Siliconix |
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SUR50N03-12P-E3 Datasheet(HTML) 1 Page - Vishay Siliconix |
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1 / 4 page  FEATURES D TrenchFETr Power MOSFET D PWM Optimized D 100% Rg Tested APPLICATIONS D DC/DC Converters − High-Side, Desktop CPU Core D Synchronous Rectifiers SUR50N03-12P Vishay Siliconix New Product Document Number: 72774 S-32695—Rev. A, 19-Jan-04 www.vishay.com 1 N-Channel 30-V (D-S) MOSFET PRODUCT SUMMARY VDS (V) rDS(on) (W) ID (A)a 30 0.012 @ VGS = 10 V 17.5 30 0.0175 @ VGS = 4.5 V 14.5 D G S N-Channel MOSFET TO-252 Reverse Lead DPAK Top View Drain Connected to Tab Ordering Information: SUR50N03-12P—E3 SUR50N03-12P-T4—E3 (altrenate tape orientation) S GD ABSOLUTE MAXIMUM RATINGS (TA = 25_C UNLESS OTHERWISE NOTED) Parameter Symbol Limit Unit Drain-Source Voltage VDS 30 V Gate-Source Voltage VGS "20 V TC = 25_C 47 Continuous Drain Currenta TA = 25_C ID 17.5 TA = 100_C D 12.4 A Pulsed Drain Current IDM 40 A Continuous Source Current (Diode Conduction)a IS 5 Single Pulse Avalanche Current L = 0 1 mH IAS 30 Single Pulse Avalanche Energy L = 0.1 mH EAS 45 mJ Maximum Power Dissipation TC = 25_C PD 46.8 W Maximum Power Dissipation TA = 25_C PD 6.5a W Operating Junction and Storage Temperature Range TJ, Tstg −55 to 175 _C THERMAL RESISTANCE RATINGS Parameter Symbol Typical Maximum Unit Maximum Junction to Ambienta t v 10 sec R 18 23 Maximum Junction-to-Ambienta Steady State RthJA 40 50 _C/W Maximum Junction-to-Case RthJC 2.6 3.2 C/W Notes a. Surface Mounted on FR4 Board, t v 10 sec. |
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