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SF5887SG Datasheet(PDF) 2 Page - SIFIRST TECHNOLOGIES NANHAI LIMITED

Part No. SF5887SG
Description  2nd Generation Quasi-Resonant (QR-IITM ) PWM Controller OTP Protection
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Maker  SIFIRST [SIFIRST TECHNOLOGIES NANHAI LIMITED]
Homepage  http://www.sifirsttech.com/en/
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SF5887SG Datasheet(HTML) 2 Page - SIFIRST TECHNOLOGIES NANHAI LIMITED

   
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©SiFirst Technology
- 2 -
Confidential
SiFirst_DS_5887_V1.0
SF5887
Pin Configuration
RI
FB
1
2
3
CS
RT
DEM
VCC
SOP8
4
8
7
6
5
GND
GATE
Ordering Information
Part Number
Top Mark
Package
Tape & Reel
SF5887SG
SF5887SG
SOP8
Green
SF5887SGT
SF5887SG
SOP8
Green
Yes
Marking Information
S F 5 8 8 7 S G
Y WW
YWW: Year&Week code
Pin Description
Pin Num
Pin Name
I/O
Description
1
RI
I
Set the internal frequency and timer by connecting a resistor between RI
and GND. The resistor is recommended to be set in the vicinity of 20K
Ohm.
2
FB
I
Voltage feedback pin. The loop regulation is achieved by connecting a
photo-coupler to this pin. PWM duty cycle is generated by this pin voltage
and the current sense signal at Pin 3.
3
CS
I
Current sense input pin.
4
GND
P
IC ground pin.
5
GATE
O
Totem-pole gate driver output to drive the external MOSFET.
6
VCC
P
IC power supply pin.
7
DEM
I
Transformer core demagnetization detection pin. This pin is also used for
output over voltage protection (Output OVP).
8
RT
I
This pin is for over temperature protection by connecting an external NTC
resistor to ground. Once the pin voltage drops below a fixed limit of 1.05V,
PWM output will be disabled.


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