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NUC120RE3DN Datasheet(PDF) 61 Page - Nuvoton Technology Corporation |
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NUC120RE3DN Datasheet(HTML) 61 Page - Nuvoton Technology Corporation |
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61 / 107 page  NUC100/120xxxDN Aug 31, 2015 Page 61 of 107 Rev 1.01 1 0 PLLCON[19] 22.1184 MHz 4~24 MHz PLLFOUT 111 011 010 001 4~24 MHz 32.768 kHz 4~24 MHz HCLK 22.1184 MHz 000 1/2 1/2 1/2 CLKSEL0[5:3] 1 0 SysTick TMR 0 ADC UART 0-2 PDMA ACMP I2C 0~1 I2S RTC PWM 0-1 WDT PWM 2-3 PWM 4-5 PWM 6-7 TMR 3 TMR 2 TMR 1 CPU FMC 32.768 kHz 10 kHz 011 010 001 000 HCLK 32.768 kHz 4~24 MHz 111 011 010 001 PLLFOUT 32.768 kHz 4~24 MHz 10 kHz 22.1184 MHz 000 CLKSEL0[2:0] SYST_CSR[2] CPUCLK 1/(HCLK_N+1) PCLK CPUCLK HCLK 11 01 00 PLLFOUT 4~24 MHz HCLK CLKSEL1[3:2] External trigger CLKSEL1[22:20] CLKSEL1[18:16] CLKSEL1[14:12] CLKSEL1[10:8] 11 10 01 00 HCLK PLLFOUT 4~24 MHz 22.1184 MHz 011 010 001 000 HCLK 4~24 MHz 22.1184 MHz 32.768 kHz 22.1184 MHz 32.768 kHz WWDT 10 kHz 1/(ADC_N+1) CLKSEL2[1:0] 11 10 CLKSEL1[1:0] HCLK 1/2048 1/(UART_N+1) 22.1184 MHz 4~24 MHz 01 32.768 kHz 11 01 00 PLLFOUT 4~24 MHz 22.1184 MHz CLKSEL1[25:24] 22.1184 MHz 10 11 01 00 PLLFOUT 4~24 MHz HCLK CLKSEL3[5:4] 22.1184 MHz 10 SC 2 1/(SC2_N+1) CLKSEL3[3:2] CLKSEL3[1:0] SC 1 1/(SC1_N+1) SC 0 1/(SC0_N+1) 10 kHz 22.1184 MHz 101 111 1 0 SPI0-3 SYST_CSR[2] CPUCLK USB 1/(USB_N+1) PLLFOUT 11 10 01 00 HCLK 4~24 MHz 22.1184 MHz 32.768 kHz CLKSEL2[3:2] FDIV BOD 10 kHz 11 10 CLKSEL2[17:16] 10 kHz CLKSEL2[11:4] CLKSEL1[31:28] 10 kHz 111 PS2 22.1184 MHz EBI Note: Before clock switching, both the pre-selected and newly selected clock sources must be turned on and stable. Figure 6-10 Clock Generator Global View Diagram |
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Similar Description - NUC120RE3DN |
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