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PALCE16V8 Datasheet(PDF) 1 Page - Cypress Semiconductor

Part No. PALCE16V8
Description  Flash-Erasable Reprogrammable CMOS PAL Device
Download  13 Pages
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Maker  CYPRESS [Cypress Semiconductor]
Homepage  http://www.cypress.com
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PALCE16V8 Datasheet(HTML) 1 Page - Cypress Semiconductor

 
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USE ULTRA37000™ FOR
ALL NEW DESIGNS
Flash-Erasable Reprogrammable
CMOS PAL® Device
PALCE16V8
Cypress Semiconductor Corporation
3901 North First Street
San Jose
, CA 95134
408-943-2600
Document #: 38-03025 Rev. *A
Revised April 22, 2004
Features
• Active pull-up on data input pins
• Low power version (16V8L)
— 55 mA max. commercial (10, 15, 25 ns)
— 65 mA max. industrial (10, 15, 25 ns)
— 65 mA military (15 and 25 ns)
• Standard version has low power
— 90 mA max. commercial (10, 15, 25 ns)
— 115 mA max. commercial (7 ns)
— 130 mA max. military/industrial (10, 15, 25 ns)
• CMOS Flash technology for electrical erasability and
reprogrammability
• PCI-compliant
• User-programmable macrocell
— Output polarity control
— Individually selectable for registered or combina-
torial operation
• Up to 16 input terms and eight outputs
• 7.5 ns com’l version
5 ns tCO
5 ns tS
7.5 ns tPD
125-MHz state machine
• 10 ns military/industrial versions
7 ns tCO
10 ns tS
10 ns tPD
62-MHz state machine
• High reliability
— Proven Flash technology
— 100% programming and functional testing
Functional Description
The Cypress PALCE16V8 is a CMOS Flash Electrical
Erasable
second-generation
programmable
array
logic
device. It is implemented with the familiar sum-of-product
(AND-OR) logic structure and the programmable macrocell.
88
88
8
8
8
8
10
98
7
6
5
432
1
11
12
13
14
15
16
17
18
19
20
PROGRAMMABLE
AND ARRAY
(64 x 32)
Macrocell
Macrocell
Macrocell
Macrocell
Macrocell
Macrocell
Macrocell
Macrocell
GND
I8
I7
I6
I5
I4
I3
I2
I1
CLK/I0
OE/I9
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
VCC
Logic Block Diagram (PDIP/CDIP)
Pin Configurations
PLCC/LCC
Top View
18
17
16
15
14
4
5
6
7
8
9 10111213
32 1
19
20
CLK/I0
I1
I2
I3
I4
I8
GND
OE/I9
VCC
I/O7
I/O6
I/O4
I/O3
I/O2
I/O0
I/O5
I5
I6
I7
I/O1
1
2
3
4
5
6
7
8
9
10
11
12
16
15
14
13
17
20
19
18
DIP
I3
I4
I5
I6
I7
I/O6
I/O4
I/O3
I/O2
I/O5
Top View


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