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PALCE16V8 Datasheet(PDF) 5 Page - Cypress Semiconductor

Part No. PALCE16V8
Description  Flash-Erasable Reprogrammable CMOS PAL Device
Download  13 Pages
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Maker  CYPRESS [Cypress Semiconductor]
Homepage  http://www.cypress.com
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PALCE16V8 Datasheet(HTML) 5 Page - Cypress Semiconductor

 
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USE ULTRA37000™ FOR
ALL NEW DESIGNS
PALCE16V8
Document #: 38-03025 Rev. *A
Page 5 of 13
AC Test Loads and Waveforms
Specification
S1
CL
Commercial
Military
Measured Output Value
R1
R2
R1
R2
tPD, tCO
Closed
50 pF
200
390
390
750
1.5V
tPZX, tEA
Z · H: Open
Z · L: Closed
1.5V
tPXZ, tER
H · Z: Open
L · Z: Closed
5 pF
H · Z: VOH – 0.5V
L · Z: VOL + 0.5V
Commercial and Industrial Switching Characteristics [2]
Parameter
Description
16V8-5
16V8-7
16V8-10
16V8-15
16V8-25
Unit
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
tPD
Input to Output
Propagation Delay[8, 9]
1
5
3
7.5
3
10
3
15
3
25
ns
tPZX
OE to Output Enable
1
6
6
10
15
20
ns
tPXZ
OE to Output Disable
1
5
6
10
15
20
ns
tEA
Input to Output
Enable Delay[7]
1
6
9
10
15
25
ns
tER
Input to Output
Disable Delay[7, 10]
1
5
9
10
15
25
ns
tCO
Clock to Output Delay[8, 9]
1
42
5
2
7
2
10
2
12
ns
tS
Input or Feedback
Set-up Time
3
5
7.5
12
15
ns
tH
Input Hold Time
0
00
0
0
ns
tP
External Clock
Period (tCO + tS)
7
10
14.5
22
27
ns
Shaded areas contain preliminary information.
Notes:
8. Min. times are tested initially and after any design or process changes that may affect these parameters.
9. This specification is guaranteed for all device outputs changing state in a given access cycle.
10. This parameter is measured as the time after OE pin or internal disable input disables or enables the output pin. This delay is measured to the point at which a previous HIGH
level has fallen to 0.5 volts below VOH min. or a previous LOW level has risen to 0.5 volts above VOL max.
11. This specification indicates the guaranteed maximum frequency at which a state machine configuration with external feedback can operate.
12. This specification indicates the guaranteed maximum frequency at which the device can operate in data path mode.
13. This specification indicates the guaranteed maximum frequency at which a state machine configuration with internal only feedback can operate.
14. This parameter is calculated from the clock period at fMAX internal (1/fMAX3) as measured (see Note 7 above) minus tS.
90%
10%
3.0V
GND
90%
10%
ALL INPUT PULSES
<2 ns
<2 ns
OUTPUT
R2
R1
CL
S1
5V
TEST POINT


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