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LV1050M Datasheet(PDF) 4 Page - Sanyo Semicon Device

Part No. LV1050M
Description  Dolby Pro Logic Surround Decoder
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Manufacturer  SANYO [Sanyo Semicon Device]
Direct Link  https://www.sanyo-av.com/us/
Logo SANYO - Sanyo Semicon Device

LV1050M Datasheet(HTML) 4 Page - Sanyo Semicon Device

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LV1050M
No.6628-4/14
L--BPF2
64
R--BPF2
1
DC--CUT
59
L--DC--OUT
6
C--MODE
58
VRBF
7
NS--BPF1
56
MIX--OUT
MIX--OUT
9
NS--BPF2
55
C--OUT
C--OUT
10
OSC
54
AC--GND
11
CLK
CLK
53
MIX--IN
12
DATA
DATA
52
DELAY--IN
DELAY--IN
13
LC--INE
47
RS--OUT
RS--OUT
18
VDD
45
DC OUT
20
DC OUT--IN
21
NS
43
VCC2
22
RS--DC OUT--OUT
D/A
42
23
RS--DC OUT--IN
10
µF
10
µF
10
µF
10
µF
220
µF
220
µF
0.1
µF
10
µF
10
µF
220
µF
10
µF
10
µF
10
µF
10
µF
10
µF
0.33
µF
0.1
µF
1
µF
1
µF
220
µF
L.P.F
30
31
32
33
34
35
36
37
38
39
40
29
28
27
26
25
+
+
+
+
+
+
+
ILV00007
L--BPF1
63
R--BPF1
2
FC--C--IN
62
S--DC--OUT
3
RT--IN
61
C--DC--OUT
4
60
LT--IN
5
R--DC--OUT
GND1
57
VCC1
8
ENABLE
ENABLE
GND
VCC
51
DELAY--OUT
DELAY--OUT
14
VSS
50
L--OUT
L--OUT
15
CR--IN
49
R--OUT
R--OUT
16
CR--OT
48
LS--OUT
LS--OUT
17
LC--INB
46
LFE--OUT
LFE--OUT
19
ANALOG
ANALOG
LT--IN
RT--IN
FC--C--IN
DIGITAL
AGND
41
24
+
+
+
+
+
+
+
+
+
+
+
1
µF
0.1
µF
0.1
µF
LL--LOW, LEAK
100 pF
15 pF
+
75
74
73
72
71
70
69
68
67
66
65
76
77
78
79
80
A/D
44
B
A
A
B
C
D
A
B
C
D
A
A
SW12
SW5
SW6
SW4
SW5
SW5
SW1
SW2
B
C
D
SW11
82000 pF
82000 pF
220
µF
3300 pF
+
0.1
µF
51 pF
10
µH
SVC201
680 pF
47 nF
22 nF
0.47
µF
0.1
µF
47
µF
+
2.2
µF
+
2.2
µF
+
2.2
µF
+
--
+
BPF
RECT
RECT
LOGDIFF
LOGDIFF
PG
PG
VCA
VCA
VCA
VCA
R
L
L
R
VCA
CH--CONT
C--MODE
R--STEREO
VOL/MUTE
ADM--CONT
ADM
8K--SRAM
VCA
VCA
VCA
RECT
BPF
VCS
VLR
RECT
SR
C
L
4PIN
5PIN
3PIN
59PIN
6PIN
R
L
R
3
L
S
S MODE
CTRIM
11PIN
VREF
+
C
--
+
B
A
B
B
A
B
A
B
A
B
A
A
B
C
D
20 K
20 K
20 K
20 K
A
B
C
D
OUT--FILTER
B--NR
DATA--DEC
OSC
OSC
VDD
DEV
NOISE--GEN
NOISE--FIL
BPL--CONT
VOL
VOL
A
B
A
B
50 K
50 K
A
B
C
D
36PIN
500 Hz HPF
VIRTUAL
B
A
LS--TRIM
RS--TRIM
LFE--TRIM
VIRTUAL
B
A
RS
LS
+
+
+
+
SW11
SW11
REVERB
FILTER
Notes on LV1050M Usage
Power is supplied to the matrix and steering control circuit in the LV1050M Dolby Prologic surround decoder from
VCC1 (pin8) and GND1 (pin57). Power is supplied to the delay line circuit in the surround block from VCC2
(pin22)and GND2 (pin41), and power is supplied to the digital circuit blocks from VDD (pin45) and VSS (pin50).
One Point that requires care is that mutual interactions (due to, for example, common impedances) between these
power supply lines may influences the signals being processed, if this happens, phenomena such as souns not being
moved smoothly may occur.
To prevent such phenomena from occurring, observe the following recommendations.
– Design the printed circuit board layout so that all VCC and ground lines are as short and as wide as possible.
– Connect all VCC and ground lines to the power supply independently.
– Connect capacitors (about 220
µF) between each of the VCC and ground pairs as close to the IC pins as possible.
Note : A sample power supply line layout is presented in the above diagram for reference.
Sample Application Circuit


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