Integrated Circuit Solution Inc.

1

SR016-0B

IS62C1024

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We assume no responsibility for any errors

which may appear in this publication.

© Copyright 2000, Integrated Circuit Solution Inc.

DESCRIPTION

The

ICSI

IS62C1024 is a low power,131,072-word by 8-bit

CMOS

static

RAM.

It

is

fabricated

using

ICSI

's

high-

performance CMOS technology. This highly reliable process

coupled with innovative circuit design techniques, yields higher

performance and low power consumption devices.

When

CE1 is HIGH or CE2 is LOW (deselected), the device

assumes a standby mode at which the power dissipation can

be reduced by using CMOS input levels.

Easy memory expansion is provided by using two Chip Enable

inputs,

CE1 and CE2. The active LOW Write Enable (WE)

controls both writing and reading of the memory.

The IS62C1024 is available in 32-pin 600mil DIP, 450mil SOP

and 8*20mm TSOP-1 packages.

FUNCTIONAL BLOCK DIAGRAM

A0-A16

CE1

OE

WE

512 x 2048

MEMORY ARRAY

DECODER

COLUMN I/O

CONTROL

CIRCUIT

GND

VCC

I/O

DATA

CIRCUIT

I/O0-I/O7

CE2

IS62C1024

128K x 8 HIGH-SPEED CMOS STATIC RAM

FEATURES

•

High-speed access time: 35, 45, 55, 70 ns

• Low active power: 450 mW (typical)

• Low standby power: 500 µW (typical) CMOS

standby

•

Output Enable (

OE) and two Chip Enable

(

CE1 and CE2) inputs for ease in applications

•

Fully static operation: no clock or refresh

required

•

TTL compatible inputs and outputs

•

Single 5V (±10%) power supply