AD7683 datasheet(5/16 Pages) AD | 16-Bit, 100 kSPS PulSAR ADC in MSOP/QFN

Part No.	AD7683

Description	16-Bit, 100 kSPS PulSAR ADC in MSOP/QFN

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AD7683

Rev. 0 | Page 5 of 16

TIMING SPECIFICATIONS

VDD = 2.7 V to 5.5 V; TA = −40°C to +85°C, unless otherwise noted.

Table 5.

Parameter

Symbol

Min

Typ

Max

Unit

Throughput Rate

tCYC

100

kHz

CS Falling to DCLOCK Low

tCSD

0

µs

CS Falling to DCLOCK Rising

tSUCS

20

ns

DCLOCK Falling to Data Remains Valid

tHDO

5

16

ns

CS Rising Edge to DOUT High Impedance

tDIS

14

100

ns

DCLOCK Falling to Data Valid

tEN

16

50

ns

Acquisition Time

tACQ

400

ns

DOUT Fall Time

tF

11

25

ns

DOUT Rise Time

tR

11

25

ns

DOUT

DCLOCK

COMPLETE CYCLE

POWER DOWN

CS

D15 D14 D13 D12 D11 D10 D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

(MSB)

(LSB)

Hi-Z

0

Hi-Z

tACQ

tDIS

0

14

5

tHDO

tEN

tCSD

tSUCS

tCYC

NOTE:

A MINIMUM OF 22 CLOCK CYCLES ARE REQUIRED FOR 16-BIT CONVERSION. SHOWN ARE 24 CLOCK CYCLES.

DOUT GOES LOW ON THE DCLOCK FALLING EDGE FOLLOWING THE LSB READING.

Figure 2. Serial Interface Timing

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