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RTL8211E-VL-CG Datasheet(PDF) 27 Page - Realtek Semiconductor Corp. |
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RTL8211E-VL-CG Datasheet(HTML) 27 Page - Realtek Semiconductor Corp. |
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27 / 75 page  RTL8211E/RTL8211EG Datasheet Integrated 10/100/1000M Ethernet Transceiver 19 Track ID: JATR-2265-11 Rev. 1.4 Preamble suppression is the default setting of the RTL8211E/RTL8211EG after power-on. However, there still must be at least one idle bit between operations. The RTL8211E/RTL8211EG can share the same MDIO line. In switch/router applications, each port should be assigned a unique address during the hardware reset sequence, and it can only be addressed via that unique PHY address. For detailed information on the RTL8211E/RTL8211EG management registers, see section 8 Register Descriptions, page 30. Table 14. Management Frame Format Management Frame Fields Preamble ST OP PHYAD REGAD TA DATA IDLE Read 1…1 01 10 AAAAA RRRRR Z0 DDDDDDDDDDDDDDDD Z Write 1…1 01 01 AAAAA RRRRR 10 DDDDDDDDDDDDDDDD Z Table 15. Management Frame Description Name Description Preamble 32 Contiguous Logical 1’s Sent by the MAC on MDIO, along with 32 Corresponding Cycles on MDC. This provides synchronization for the PHY. ST Start of Frame. Indicated by a 01 pattern. OP Operation Code. Read: 10 Write: 01 PHYAD PHY Address. Up to 4 PHYs can be connected to one MAC. This 2-bit field selects which PHY the frame is directed to. REGAD Register Address. This is a 5-bit field that sets which of the 32 registers of the PHY this operation refers to. TA Turnaround. This is a 2-bit-time spacing between the register address and the data field of a frame to avoid contention during a read transaction. For a read transaction, both the STA and the PHY remain in a high-impedance state for the first bit time of the turnaround. The PHY drives a zero bit during the second bit time of the turnaround of a read transaction. DATA Data. These are the 16 bits of data. IDLE Idle Condition. Not truly part of the management frame. This is a high impedance state. Electrically, the PHY’s pull-up resistor will pull the MDIO line to a logical ‘1’. |
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