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RTL8211E-VB-CG Datasheet(PDF) 28 Page - Realtek Semiconductor Corp. |
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RTL8211E-VB-CG Datasheet(HTML) 28 Page - Realtek Semiconductor Corp. |
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28 / 79 page  RTL8211E/RTL8211EG Datasheet Integrated 10/100/1000M Ethernet Transceiver 19 Track ID: JATR-3375-16 Rev. 1.6 7.10. MAC/PHY Interface The RTL8211E-VB/RTL8211E-VL supports industry standards and is suitable for most off-the-shelf MACs with an RGMII interface. The RTL8211EG-VB supports industry standards and is suitable for most off-the-shelf MACs with GMII and RGMII interfaces. 7.10.1. MII In 100Base-TX and 10Base-T modes (MII mode is selected), TXC and RXC sources are 25MHz and 2.5MHz respectively. TXC and RXC will always be generated by the PHY. TXD[3:0] and RXD[3:0] signals are used for data transitions. 7.10.2. GMII In 1000Base-T mode (GMII interface is selected), a 125MHz transmit clock is expected on GTX_CLK. RXCLK sources the 125MHz receive clock. 7.10.3. RGMII In 1000Base-T mode (RGMII interface is selected), TXC and RXC sources are 125MHz. TXC will always be generated by the MAC and RXC will always be generated by the PHY. TXD[3:0] and RXD[3:0] signals are used for data transitions on rising edge and on falling edge of clock. 7.10.4. Management Interface The management interface provides access to the internal registers through the MDC and MDIO pins as described in IEEE 802.3u section 22. The MDC signal, provided by the MAC, is the management data clock reference to the MDIO signal. The MDIO is the management data input/output and is a bi-directional signal that runs synchronously to MDC. The MDIO pin needs a 1.5k Ohm pull-up resistor to maintain the MDIO high during idle and turnaround. Preamble suppression is the default setting of the RTL8211E-VB(VL)/RTL8211EG-VB after power-on. However, there still must be at least one idle bit between operations. The RTL8211E-VB(VL)/RTL8211EG-VB can share the same MDIO line. In switch/router applications, each port should be assigned a unique address during the hardware reset sequence, and it can only be addressed via that unique PHY address. For detailed information on the RTL8211E-VB(VL)/RTL8211EG-VB management registers, see section 8 Register Descriptions, page 30. |
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