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MAX7314 Datasheet(PDF) 12 Page - Maxim Integrated Products |
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MAX7314 Datasheet(HTML) 12 Page - Maxim Integrated Products |
12 / 25 page Transition Detection All ports configured as inputs are always monitored for changes in their logic status. The action of reading an input ports register or writing to the configuration regis- ter samples the corresponding 8 port bits’ input condi- tion (Tables 4, 6). This sample is continuously compared with the actual input conditions. A detected change in input condition causes an interrupt condition. The interrupt is cleared either automatically if the changed input returns to its original state, or when the appropriate input ports register is read, updating the compared data (Figure 10). Randomly changing a port from an output to an input may cause a false interrupt to occur if the state of the input does not match the content of the appropriate input ports register. The interrupt status is available as the interrupt flag INT in the configuration register (Table 4). The input status of all ports is sampled immediately after power-up as part of the MAX7314’s internal initial- ization, so if all the ports are pulled to valid logic levels at that time, an interrupt does not occur at power-up. INT/O16 Output The INT/O16 output pin can be configured as either the INT output that reflects the interrupt flag logic state or as a general-purpose output O16. When used as a general- purpose output, the INT/O16 pin has the same blink and PWM intensity control capabilities as the other ports. Set the interrupt enable I bit in the configuration register to configure INT/O16 as the INT output (Table 4). Clear interrupt enable to configure INT/O16 as the O16. The O16 logic state is set by the 2 bits O1 and O0 in the configuration register. O16 follows the rules for blinking selected by the blink enable flag E in the configuration register. If blinking is disabled, then interrupt output control O0 alone sets the logic state of the INT/O16 pin. If blinking is enabled, then both interrupt output con- trols O0 and O1 set the logic state of the INT/O16 pin according to the blink phase. PWM intensity control for O16 is set by the 4 global intensity bits in the master and O16 intensity register (Table 13). 18-Port GPIO with LED Intensity Control, Interrupt, and Hot-Insertion Protection 12 ______________________________________________________________________________________ Table 3. Power-Up Configuration REGISTER DATA REGISTER FUNCTION POWER-UP CONDITION ADDRESS CODE (hex) D7 D6 D5 D4 D3 D2 D1 D0 Blink phase 0 outputs P7–P0 High-impedance outputs 0x02 1 1 1 1 1 1 1 1 Blink phase 0 outputs P15–P8 High-impedance outputs 0x03 1 1 1 1 1 1 1 1 Ports configuration P7–P0 Ports P7–P0 are inputs 0x06 1 1 1 1 1 1 1 1 Ports configuration P15–P8 Ports P15–P8 are inputs 0x07 1 1 1 1 1 1 1 1 Blink phase 1 outputs P7–P0 High-impedance outputs 0x0A 1 1 1 1 1 1 1 1 Blink phase 1 outputs P15–P8 High-impedance outputs 0x0B 1 1 1 1 1 1 1 1 Master, O16 intensity PWM oscillator is disabled; O16 is static logic output 0x0E 0 0 0 0 1 1 1 1 Configuration INT/O16 is interrupt output; blink is disabled; global intensity is enabled 0x0F 0 0 0 0 1 1 0 0 Outputs intensity P1, P0 P1, P0 are static logic outputs 0x10 1 1 1 1 1 1 1 1 Outputs Intensity P3, P2 P3, P2 are static logic outputs 0x11 1 1 1 1 1 1 1 1 Outputs intensity P5, P4 P5, P4 are static logic outputs 0x12 1 1 1 1 1 1 1 1 Outputs intensity P7, P6 P7, P6 are static logic outputs 0x13 1 1 1 1 1 1 1 1 Outputs intensity P9, P8 P9, P8 are static logic outputs 0x14 1 1 1 1 1 1 1 1 Outputs intensity P11, P10 P11, P10 are static logic outputs 0x15 1 1 1 1 1 1 1 1 Outputs intensity P13, P12 P13, P12 are static logic outputs 0x16 1 1 1 1 1 1 1 1 Outputs intensity P15, P14 P15, P14 are static logic outputs 0x17 1 1 1 1 1 1 1 1 |
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