Detailed Operating Description

(Continued)

2.

when driving low threshold MOSFETs at high junction

temperatures

3.

when high switching speeds produce capacitive gate-

drain current that lifts the internal gate potential of the

MOSFET

The two driver channels of the LM5110 are designed as

identical cells. Transistor matching inherent to integrated

circuit manufacturing ensures that the ac and dc perfor-

mance of the channels are nearly identical. Closely matched

propagation delays allow the dual driver to be operated as a

single driver if inputs and output pins are connected. The

drive current capability in parallel operation is 2X the drive of

either channel. Small differences in switching speed be-

tween the driver channels will produce a transient current

(shoot-through) in the output stage when two output pins are

connected to drive a single load. The efficiency loss for

parallel operation has been characterized at various loads,

supply voltages and operating frequencies. The power dis-

sipation in the LM5110 increases by less than 1% relative to

the dual driver configuration when operated as a single

driver with inputs and outputs connected.

An Under-voltage lockout (UVLO) circuit is included in the

LM5110, which senses the voltage difference between V

CC

and the input ground pin, IN_REF. When the V

voltage difference falls below 2.7V both driver channels are

disabled. The driver will resume normal operation when the

V

2.9V. UVLO hysteresis prevents chattering during brown-out

conditions.

The Shutdown pin (nSHDN) is a TTL compatible logic input

provided to enable/disable both driver channels. When

nSHDN is in the logic low state, the LM5110 is switched to a

low power standby mode with total supply current less than

25 µA. This function can be effectively used for start-up,

thermal overload, or short circuit fault protection. It is recom-

mended that this pin be connected to V

down function is not being used. The shutdown pin has an

internal 18µA current source pull-up to V

The input pins of non-inverting drivers have an internal 18µA

current source pull-down to IN-REF. The input pins of invert-

ing driver channels have neither pull-up nor pull-down cur-

rent sources.

The LM5110 is available in dual non-inverting (-1), dual

inverting (-2) and the combination inverting plus non-

inverting (-3) configurations. All three configurations are of-

fered in the SOIC-8 and LLP-10 plastic packages.

Layout Considerations

Attention must be given to board layout when using LM5110.

Some important considerations include:

1.

A Low ESR/ESL capacitor must be connected close to

the IC and between the V

high peak currents being drawn from V

of the MOSFET.

2.

Proper grounding is crucial. The drivers need a very low

impedance path for current return to ground avoiding

inductive loops. The two paths for returning current to

ground are a) between LM5110 IN-REF pin and the

ground of the circuit that controls the driver inputs, b)

between LM5110 V

MOSFET being driven. All these paths should be as

short as possible to reduce inductance and be as wide

as possible to reduce resistance. All these ground paths

should be kept distinctly separate to avoid coupling be-

tween the high current output paths and the logic signals

that drive the LM5110. A good method is to dedicate one

copper plane in a multi-layered PCB to provide a com-

mon ground surface.

3.

With the rise and fall times in the range of 10 ns to 30 ns,

care is required to minimize the lengths of current car-

rying conductors to reduce their inductance and EMI

from the high di/dt transients generated by the LM5110.

4.

The LM5110 SOIC footprint is compatible with other

industry standard drivers. Simply connect IN_REF pin of

the LM5110 to V

in a standard single supply configuration.

5.

If either channel is not being used, the respective input

pin (IN_A or IN_B) should be connected to either

IN_REF or V

shutdown feature is not used, the nSHDN pin should be

connected to V

result if system noise were coupled into a floating

’nSHDN’ pin.

Thermal Performance

INTRODUCTION

The primary goal of thermal management is to maintain the

integrated circuit (IC) junction temperature (T

below a

specified maximum operating temperature to ensure reliabil-

ity. It is essential to estimate the maximum T

nents in worst case operating conditions. The junction tem-

perature is estimated based on the power dissipated in the

IC and the junction to ambient thermal resistance

θ

IC package in the application board and environment. The

θ

the printed circuit board design and the operating environ-

ment.

DRIVE POWER REQUIREMENT CALCULATIONS IN

LM5110

The LM5110 dual low side MOSFET driver is capable of

sourcing/sinking 3A/5A peak currents for short intervals to

drive a MOSFET without exceeding package power dissipa-

tion limits. High peak currents are required to switch the

MOSFET gate very quickly for operation at high frequencies.

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