Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

PALCE22V10 Datasheet(PDF) 6 Page - Cypress Semiconductor

Part No. PALCE22V10
Description  Flash-erasable Reprogrammable CMOS PAL Device
Download  13 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

PALCE22V10 Datasheet(HTML) 6 Page - Cypress Semiconductor

Back Button PALCE22V10 Datasheet HTML 2Page - Cypress Semiconductor PALCE22V10 Datasheet HTML 3Page - Cypress Semiconductor PALCE22V10 Datasheet HTML 4Page - Cypress Semiconductor PALCE22V10 Datasheet HTML 5Page - Cypress Semiconductor PALCE22V10 Datasheet HTML 6Page - Cypress Semiconductor PALCE22V10 Datasheet HTML 7Page - Cypress Semiconductor PALCE22V10 Datasheet HTML 8Page - Cypress Semiconductor PALCE22V10 Datasheet HTML 9Page - Cypress Semiconductor PALCE22V10 Datasheet HTML 10Page - Cypress Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 13 page
background image
PALCE22V10
USE ULTRA37000TM FOR
ALL NEW DESIGNS
Document #: 38-03027 Rev. *B
Page 6 of 13
tS1
Input or Feedback Set-Up Time
3
5
6
10
15
ns
tS2
Synchronous Preset Set-Up
Time
4
6
7
10
15
ns
tH
Input Hold Time
0
0
0
0
0
ns
tP
External Clock Period (tCO + tS)
7
10
12
20
30
ns
tWH
Clock Width HIGH[6]
2.5
3
3
6
13
ns
tWL
Clock Width LOW[6]
2.5
3
3
6
13
ns
fMAX1
External Maximum
Frequency (1/(tCO + tS))
[11]
143
100
76.9
55.5
33.3
MHz
fMAX2
Data Path Maximum Frequency
(1/(tWH + tWL))
[6, 12]
200
166
142
83.3
35.7
MHz
fMAX3
Internal Feedback Maximum
Frequency (1/(tCF + tS))
[6,13]
181
133
111
68.9
38.5
MHz
tCF
Register Clock to
Feedback Input[6,14]
2.5
2.5
3
4.5
13
ns
tAW
Asynchronous Reset Width
8
8
10
15
25
ns
tAR
Asynchronous Reset
Recovery Time
4
5
6
10
25
ns
tAP
Asynchronous Reset to
Registered Output Delay
7.5
12
13
20
25
ns
tSPR
Synchronous Preset
Recovery Time
4
6
8
10
15
ns
tPR
Power-up Reset Time[6,15]
1
1
1
1
1
µs
Military and Industrial Switching Characteristics PALCE22V10 [2, 7]
Parameter
Description
22V10-10
22V10-15
22V10-25
Unit
Min.
Max.
Min.
Max.
Min.
Max.
tPD
Input to Output
Propagation Delay[8]
3
10
3
15
3
25
ns
tEA
Input to Output Enable Delay[9]
10
15
25
ns
tER
Input to Output Disable Delay[10]
10
15
25
ns
tCO
Clock to Output Delay[8]
2
7
2
8
2
15
ns
tS1
Input or Feedback Set-up Time
6
10
18
ns
tS2
Synchronous Preset Set-up Time
7
10
18
ns
tH
Input Hold Time
0
0
0
ns
tP
External Clock Period (tCO + tS)
12
20
33
ns
tWH
Clock Width HIGH[6]
3
6
14
ns
tWL
Clock Width LOW[6]
3
6
14
ns
fMAX1
External Maximum Frequency
(1/(tCO + tS))
[11]
76.9
50.0
30.3
MHz
fMAX2
Data Path Maximum Frequency
(1/(tWH + tWL))
[6, 12 ]
142
83.3
35.7
MHz
Notes:
11. This specification indicates the guaranteed maximum frequency at which a state machine configuration with external feedback can operate.
12. This specification indicates the guaranteed maximum frequency at which the device can operate in data path mode.
13. This specification indicates the guaranteed maximum frequency at which a state machine configuration with internal only feedback can operate.
14. This parameter is calculated from the clock period at fMAX internal (1/fMAX3) as measured (see Note above) minus tS.
15. The registers in the PALCE22V10 have been designed with the capability to reset during system power-up. Following power-up, all registers will be reset to a
logic LOW state. The output state will depend on the polarity of the output buffer. This feature is useful in establishing state machine initialization. To insure proper
operation, the rise in VCC must be monotonic and the timing constraints depicted in Power-Up Reset Waveform must be satisfied.
Commercial Switching Characteristics PALCE22V10 (continued)[2, 7]
Parameter
Description
22V10-5
22V10-7
22V10-10
22V10-15
22V10-25
Unit
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13 


Datasheet Download

Go To PDF Page

Related Electronics Part Number

Part No.DescriptionHtml ViewManufacturer
PALCE16V8 Flash-Erasable Reprogrammable CMOS PAL Device 1  2  3  4  5  More Cypress Semiconductor
PAL20V8 Flash Erasable Reprogrammable CMOS PAL Device 1  2  3  4  5  More Cypress Semiconductor
PALC22V10 Reprogrammable CMOS PAL Device 1  2  3  Cypress Semiconductor
PALCE20V8 Flash Erasable Reprogrammable CMOS PAL Device 1  2  3  4  5  More Cypress Semiconductor
PALC22V10B Reprogrammable CMOS PAL Device 1  2  3  Cypress Semiconductor
PALC22V10D FLASG ERASABLE REPROGRAMMABLE CMOS PAL DEVICE 1  2  3  4  5  More Cypress Semiconductor
PALCE26V12 28-Pin EE CMOS Versatile PAL Device 1  2  3  4  5  More Advanced Micro Devices
PALCE22V10 24-Pin EE CMOS Zero Power Versatile PAL Device 1  2  3  4  5  More Lattice Semiconductor
PALLV22V10 Low-Voltage Zero Power 24-Pin EE CMOS Versatile PAL Device 1  2  3  4  5  More Lattice Semiconductor
PLDC20G10B CMOS Generic 24-Pin Reprogrammable Logic Device 1  2  3  4  5  More Cypress Semiconductor

Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn