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LMT01 Datasheet(PDF) 18 Page - Texas Instruments |
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LMT01 Datasheet(HTML) 18 Page - Texas Instruments |
18 / 23 page MCU/ FPGA/ ASIC 34 and 125 µA 3.3V 7.5k GPIO 100k MMBT3906 VDD LMT01-SP VP VN MCU/FPGA/ ASIC 34 and 125 µA VDD 3V to 5.5V GPIO n GPIO/ COMP Min 2.0V Up to 2.0m GPIO1 GPIO2 6.81k (for 3V) LMT01-SP U1 VP VN LMT01-SP U2 VP VN LMT01-SP Un VP VN MCU/ FPGA/ ASIC 34 and 125 µA 3.3V 7.5k GPIO 100k MMBT3904 VDD LMT01-SP VP VN 18 LMT01-SP SNIS205 – JANUARY 2019 www.ti.com Product Folder Links: LMT01-SP Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated System Examples (continued) Figure 29. Transistor Level Shifting Note: to turn off an LMT01-SP set the GPIO pin connected to VP to high impedance state as setting it low would cause the off LMT01-SP to be reverse biased. Comparator input of MCU must be used. Figure 30. Connecting Multiple Devices to One MCU Input Pin Note: the VN of the LMT01-SP must be connected to the MCU GND. Figure 31. Common Ground With High-Side Signal |
Similar Part No. - LMT01 |
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Similar Description - LMT01 |
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