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K9F1G08U0E Datasheet(PDF) 10 Page - Samsung semiconductor

Part No. K9F1G08U0E
Description  1Gb E-die NAND Flash
Download  38 Pages
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Maker  SAMSUNG [Samsung semiconductor]
Homepage  http://www.samsung.com/Products/Semiconductor
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K9F1G08U0E Datasheet(HTML) 10 Page - Samsung semiconductor

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K9F1G08U0E
FLASH MEMORY
Rev. 1.11
SAMSUNG CONFIDENTIAL
2.0 PRODUCT INTRODUCTION
NAND Flash Memory has addresses multiplexed into 8 I/Os. This scheme dramatically reduces pin counts and allows system upgrades to future densities
by maintaining consistency in system board design. Command, address and data are all written through I/O's by bringing WE to low while CE is low.
Those are latched on the rising edge of WE. Command Latch Enable(CLE) and Address Latch Enable(ALE) are used to multiplex command and address
respectively, via the I/O pins. Some commands require one bus cycle. For example, Reset Command, Status Read Command, etc. require just one cycle
bus. Some other commands, like page read and block erase and page program, require two cycles: one cycle for setup and the other cycle for execution..
Page Read and Page Program need the same four address cycles following the required command input. In Block Erase operation, however, only the two
row address cycles are used. Device operations are selected by writing specific commands into the command register. Table 1 defines the specific com-
mands of the K9F1G08U0E.
[Table 1] Command Sets
NOTE :
1) Random Data Input/Output can be executed in a page.
Caution :
Any undefined command inputs are prohibited except for above command set of Table 1.
Function
1st Cycle
2nd Cycle
Acceptable Command during Busy
Read
00h
30h
Read for Copy Back
00h
35h
Read ID
90h
-
Reset
FFh
-
O
Page Program
80h
10h
Copy-Back Program
85h
10h
Block Erase
60h
D0h
Random Data Input(1)
85h
-
Random Data Output(1)
05h
E0h
Read Status
70h
-
O


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