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RTL8211E-VL Datasheet(PDF) 37 Page - Realtek Semiconductor Corp. |
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RTL8211E-VL Datasheet(HTML) 37 Page - Realtek Semiconductor Corp. |
37 / 75 page RTL8211E/RTL8211EG Datasheet Integrated 10/100/1000M Ethernet Transceiver 29 Track ID: JATR-2265-11 Rev. 1.4 7.15. Power The RTL8211E/RTL8211EG implements a voltage regulator to generate operating power. The system vendor needs to supply a 3.3V, 1A steady power source. The RTL8211E/RTL8211EG converts the 3.3V steady power source to 1.05V via a switching regulator. Another possible implementation is to use an external regulator to generate 1.0V. Be sure that the regulator meets the required current rate (0.95V~1.09V). The RTL8211E/RTL8211EG implements an option for the RGMII/GMII power pins. The standard I/O voltage of the RGMII/GMII interface is 3.3V, with support for 2.5V to lower EMI. The 2.5V power source for RGMII is from an external regulator. 7.16. PHY Reset (Hardware Reset) The RTL8211E/EG has a PHYRSTB pin to reset the chip. For a complete PHY reset, this pin must be asserted low for at least 10ms (Tgap in Figure 10) for the internal regulator. Then wait for a further 30ms before accessing the PHY register. All registers will return to default values after a hardware reset. Refer to the RTL8211xx-xx_Power_Sequence_App_Note for more detailed information. Tgap (10ms) 1.0V PHYRSTB Wait 30ms before accessing the PHY register Figure 10. PHY Reset Timing |
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